Embedded.com Tech Focus Newsletter (9-06-11): Making embedded multicore development easier - Embedded.com

Embedded.com Tech Focus Newsletter (9-06-11): Making embedded multicore development easier

Embedded Newsletter for 09-06-11

» Click here to view online I » Forward to a friend I » Sign up for an EE Times Newsletter

Share this Newsletter:

facebook linkedin twitter digg

September 6, 2011

Tech Focus: Making embedded multicore development easier

HIGHLIGHTS

Transitioning to multicore processing

Designing with core-based high-density FPGAs

The key to realizing full multicore design functionality


Editor's Note

Bernard Cole Bernard Cole
Site Editor
Embedded.com

Continuing the efforts of ESD Magazine and Embedded.com to make it easier for developers to meet the challenges of multicore application development, there will be at least five classes at the Fall ESC in Boston , September 26-29 I recommend you attend:

Writing reliable multicore code (ESC-311) , in which the top sources of runtime errors in multicore designs are identified and analysed, as are techniques to avoid them.

Software reliability on multiprocessor architectures (ESC-417) , on using source code analysis to improve multicore code reliability as it relates to concurrency and data representation.

Accelerating applications through parallelism (ESC-423) , a hands-on class on some techniques for achieving concurrency and parallel execution of existing code.

Multicore performance optimization (SS-215) , a survey of run-time tools that aid in determining if code written for a multicore app meets its stated performance and core optimization goals.

FPGA partial reconfiguration: a partner to multicore processing (SS-215), on how this technique can be used to accelerate applications written to run on FPGA-based coprocessors and core processors.

In addition, since the last ESC in the spring we have busy on the site and in ESD Magazine publishing a variety of design articles, product how-to's, webinars and sponsored technical papers to further aid you in this task. Of these my Editor's Top Picks include:

Transitioning to multicore processing
Designing with core-based high density FPGAs
Using drowsy cores to lower power in multicore SoCs
Tips on making your application code multicore ready

Given the complexity of this issue and the challenges it represents, I need your help in continuing to provide the information that will be helpful. Feel free to contact me by phone or email or at the upcoming ESC about your ideas, suggestions for improvements, and your contributions.


Design How-Tos

Transitioning to multicore processing

Hesitating to make the shift from single- to multiple-core processing in your design? Here's a guide to making the transition.

Designing with core-based high-density FPGAs

One engineer's adventures designing with microprocessor-based FPGAs.

The key to realizing full multicore design functionality

The TI authors describe the thinking behind the development of the Keystone multicore architecture and review elements designed to provide device capabilities for advanced communications infrastructure apps such as media servers & wireless baseband.

Tips on making your application code multicore ready

In this product how-to article Vector Fabrics' Paul Stavers describes a more efficient way to parallelize code for embedded multicore designs illustrating the process using the company's online tool to parallelize Google's VP8 video decoder.

Taking a multicore DSP approach to medical ultrasound beamforming

A Product How-to on using Freescale MSC8156 multicore DSP to produce diagnostically useful medical ultrasound imaging results, using no more than about 38% of the resources of the DSP, leaving enough room to also perform Doppler imaging.

Using drowsy cores to lower power in multicore SoCs

Freescale engineers describe a cascading power management technique that steers tasks to a smaller number of cores during non-peak activity periods so that the idle cores can enter a minimal-power or “drowsy” state.

Managing intelligent I/O processing on DSP + GPP SoCs

This Product How-To article about TI's OMAP-L138 C6-Integra DSP + ARM processor SoC details the steps a developer needs to follow in building an application that must balance I/O processing tasks between a general purpose microcontroller and a digital signal processor on the same IC.

It's not just about hardware anymore

Chip designers need to prove that software works, and do so quickly. A hardware/ software emulator may be the only way that a team can demonstrate that they've done a good and thorough job in a timeframe consistent with today's demanding product cycles.

Challenges of safety-critical multi-core systems

In this article, the challenges involved in migration to multi-core processor architectures are reviewed in the context of the particular ones related to their use in safety-critical systems.

Trip over threads to trap multicore bugs

Here is how developers of concurrent programs can find software bugs caused by intermittent failures, non-deterministic behavior and asynchronous events and reproduce them in a controlled environment using a new X86 Linux platform development tool.

Non-intrusive debug and performance optimization for multicore systems

While efficiently partitioned and bug-free software on multiple cores is crucial for taking full advantage of their power, debugging of such systems adds more complexity due to vanishing accessibility of the sub-system interfaces, buses and concurrency, requiring the use of advanced system trace technology.

Is lock-free programming practical for multicore?

In a multicore environment, you can do resource sharing efficiently without locks, but there are some caveats.

Managing power in embedded applications using dual operating systems

In this product how to article, TI's Loc Truong describes how to use inter-processor communication and state machine design to reduce the overall system power in a heterogeneous dual-core system.


Embedded Systems Bookshelf

Excerpts

Embedded Books Reading Room
Bernard Cole's favorite links to book excerpts.

Reviews

Engineer's Bookshelf
Airport fiction blows. A look at books other engineers are reading and why you should read them, too. Recommend and write a review yourself. E-mail Brian Fuller.

Jack Ganssle's Bookshelf
A list of book reviews by Jack Ganssle, contributing technical editor of Embedded Systems Design and Embedded.com.

Max's Cool Beans
Clive “Max” Maxfield, the editor on Programmable Logic DesignLine, often writes about interesting books.


Products

OSRAM'S new 3-in-1 hybrid sensor streamlines smart phone design and eliminates crosstalk

The new 3-in-1 SFH 7773 digital sensor from OSRAM Opto Semiconductors makes it easy to install both proximity and ambient light sensing in smart phones and similar devices by combining the functions of a digital ambient light sensor and a digital proximity sensor in a single compact unit.

TI simplifies multicore DSP software development

New software from Texas Instruments gets developers one step closer to tapping the full potential of TI multicore DSPs

TI unleashes multicore-capable TMS320C6671 DSP

TI's newest TMS320C66xx device transitions developers from fixed-and floating-point single core to multicore capability with pin and software compatibility.

FastTrack single tool chain for CPU, DSP and inter-core communication

The first iteration of FastTrack, a software evaluation kit for Freescale's QorIQ Qonverge products, has been released by Enea. FastTrack combines many of Enea's proven runtime software products and tools into a heterogeneous multicore software environment.

Freescale moves DSC up to to 32-bit core

Freescale has announced the first family in its next-generation Digital Signal Controllers (DSCs) portfolio, the MC56F84xx, which integrates high-speed analog functionality with an efficient 32-bit digital signal processor core.

ARM TechCon 2011
Learn what the most influential technology ecosystem means for future design-and for you.
ARM TechCon is a comprehensive event dedicated to the industry's fastest growing architecture. It's one place to meet our IP experts, network with our ecosystem partners, and explore future design and business possibilities. Whether your targets involve 10 cent or $1,000 solutions, don't miss your chance to learn about the smart systems, innovative MCUs and connected opportunities that have led to nearly 1 billion ARM-based processors being shipped each month.
Register and learn more


Commentary

What's new at ESC Boston 2011

Here's what's new and cutting edge at ESC Boston 2011, September 26-29, Hynes Convention Center.

ESC Boston 2011: Classes I'd attend if there were two (or more) of me

Embedded.com site editor Bernard Cole tries to find a way to make copies of himself to take full advantage of the opportunities to learn at the Embedded Systems Conference in Boston.

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.