Embedded.com Tech Focus Newsletter (9-8-14): Heterogeneous compting - Embedded.com

Embedded.com Tech Focus Newsletter (9-8-14): Heterogeneous compting


September 08, 2014

Facing the challenge of heterogeneous many-core design

In addition to Embedded.com, one of the best places to get up-to-date information on heterogeneous multicore design is at the ARM Technical Conference in Santa Clara, Ca., in three weeks.

Retargeting embedded software stacks for many-core systems

How to combine the data-centric publish/subscribe-based Data Distribution Service model with the Leader/Followers thread-pool concurrency thread management pattern.

Programming heterogeneous multicore embedded SoCs

How standards based programming models like OpenCL and OpenMP make it possible for embedded programmers to write their applications in the C language, and still take advantage of the offload capability of additional accelerators and efficiently task heterogeneous cores.

Developing a heterogeneous multicore SoC for use in a mobile environment

Imagination's Peter McGuinness recounts his company's experience in porting disparate applications to run delegated to the GPU and reports on lessons learned.

Dynamic Partitioning-based JPEG Decompression on Heterogeneous Multicores

A run-time partitioning and scheduling scheme for use on heterogeneous multiicore designs that exploits task, data and pipeline parallelism.

SAVE: Towards efficient resource management in heterogeneous systems

Addressing the challenge of exploiting specialized computing resources of a heterogeneous system architecture (HSA) by pooling them and taking advantage of their individual characteristics.

Reducing Processing Latency with a Heterogeneous FPGA-Processor Framework

A software framework for developing heterogeneous multicore designs based on ARM and the Xilinx Zynq FPGA system-on-chip

Functional TLM simplifies heterogeneous multiprocessor software development

To keep up with growing computational requirements, throughput and integrated system features of today's multiprocessor architectures, functional transaction-level modeling is a needed tool in the creation of software models that mirror the hardware requirements.

Heterogeneous vs homogeneous MPSoC approaches for a mobile LTE modem

A software-defined radio application for 4G mobile devices that uses a homogeneous processor array incorporating smart modem processors (SMEP) interconnected with a Network-on-Chip.

A 64-core platform for biomedical signal processing

A programmable many-core platform containing 64 digital signal processor cores routed in a hierarchical network tor biomedical signal processing applications.A programmable many-core platform containing 64 digital signal processor cores routed in a hierarchical network tor biomedical signal processing applications.

Using software synthesis for multiprocessor OS and software development

The president of Zeidman Technologies suggests that software synthesis may be the most direct and effective way to simplify OS and application software development for embedded multiprocessor systems in consumer, mobile and networking applications.

Using Java to deal with multicore programming complexity: Part 1

Atego’s Kelvin Nilsen surveys some of the special issues that must be addressed when writing software for multiprocessor hardware and how Java can ease the transition.

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