Embedded.com Weekly Newsletter: March 22 - 26, 2010 - Embedded.com

Embedded.com Weekly Newsletter: March 22 – 26, 2010



The Embedded Newsletter is delivered to youfree of charge from the staff of Embedded.com. To view the Embedded.com site , visit: http://www.embedded.com
Because of great interest in Jack Ganssle'srecent column on software quality , I will be includingarticles on this topic in the newsletter each week leading up to theEmbedded Systems Conference at the end of April.

This week's software qualitymust-reads are on usingstatic analysis for Agile software development , how debuggerbreakpoints can improve software quality , and a producthow-to on using a UMLgraphical tool to model C/C++ designs . In Disabling Interrupts , Jack addresses a particular software quality issue: accessing sharedresources. And Michael Barr has updated”Embeddedsystems programmers earn failing grades in C with newresults.

The Embedded Design Focus topic this week is on asynchronous logic design as a way to lower powerwithout sacrificing performance. Leading this section is an articlefrom Octasic engineers on Using asynchronousself-clocking to green your multiprocessor design .” To putthis issue in context, other must-read articles are on mainstreamacceptance of asynchronous logic , the continuing need for asynchronouslogic design tools and the design of an asynchronous DSP .

Other recommended design articles this week include: buildingquality assurance into your hardware , choosing the rightvirtualization technology and implementing custom DDR and DDR2 SDRAM . Good reading!!(Embedded.com EditorBernard Cole, bccole@acm.org )

  TOP NEWS: Week of 3-22-10 to 3-26-10
Researchers give update on road to parallelism
Researchers at the University of Illinois detailed progress on three many-core processors among several small steps they have taken on a long and complex journey toward creating new parallel programming models to harness tomorrow's many-core processors.
Smart grid group reaches out to consumers
A handful of organizations have formed the Smart Grid Consumer Collaborative, a non-profit group that aims to engage consumers in the evolution of the smart grid by conducting consumer research, education and establishing best practices.
Smart grid protocol will ride Wi-Fi at home
Zigbee and Wi-Fi backers will collaborate to on bringing the Smart Energy 2.0 protocol to Wi-Fi networks as the first phase of a broad collaboration between the Zigbee Alliance and the Wi-Fi Alliance on wireless home area networks for smart grid applications.
Quantum film threatens to replace CMOS image chips
Just as film was displaced by silicon chips, so now quantum film threatens to replace CMOS image chips by responding electrically to light instead of by changing its chemical composition.
  BREAK POINT by Jack Ganssle
Disabling Interrupts
Accessing shared resources is harder than one thinks
  BARR CODE by Michael Barr
Embedded systems programmers worldwide earn failing grades in C
In industry surveys, more than 80% of embedded software developers report using either C or C++ as their primary programming language. Yet as a group, they earned a failing grade on a multiple-choice evaluation of their firmware-related C knowledge.
  EDITOR'S TOP PICK by Bernard Cole, Embedded.com Editor
Using static code analysis for Agile software development
Since the goal of Agile development is to have working software early, source code analysis enables developers to analyze the quality and security of code from day one of coding ” one of the earliest points in the software development process
Debugger Tips: 8 ways breakpoints can save your next software project
Here are eight fairly simple techniques for using breakpoints and other features of your C/C++ debugger that can give you enormous power and visibility into your program.
  DESIGN FOCUS: Clock-Free Asynchronous Design
Using asynchronous self-clocking to “green” your multiprocessor design
For the engineers and designers, delivering a high-performance design, while keeping energy conservation in mind, remains a delicate balance. One way to do this is with the adoption of asynchronous self-clocking processing cores.
Asynchronous logic moves toward mainstream acceptance
As the semiconductor industry struggles with mountingproblems trying to achieve significant yields, higher performances andlower power without significant increases in fabrication costs,developers are turning to asynchronous alternatives to solve theseproblems.
Asynchronous DSPs: Low power, high performance
An asynchronous DSP offers better power, performance, and reliability than one based on standard synchronous logic. It also enables simpler and less expensive PCB and power supplies.
Tools must address async circuits
One need only take a cursory look at the systems-on-chip on the drawing board to see some common problems stemming from design requirements that encompass dozens of intellectual-property cores, very high-speed clocks, multiple clock domains and the ever-present need for lower power dissipation. Those characteristics have fueled interest in self-timed, asynchronous interconnect for complex chips. Unfortunately, today's EDA tools are not equipped to handle the circuitry necessary to produce such chips.
Software development – a lot more than coding
Here's how integrating graphical UML editors such as Atollic TrueSTUDIO into the C/C++ environment can provide developers better possibilities for requirements capture, and to model the static structure as well as dynamic behavior of the application.
  DESIGN ARTICLES: Week of 3-22-10 to 3-26-10
Building quality assurance into your hardware: EDA is not enough!
Good EDA tools, even combined within well-automated flows, are not enough to produce quality designs, whatever those designs are for software, systems-on-chip (SoCs), integrated circuits (ICs), intellectual property (IP) or embedded systems.
10 questions to ask when choosing a virtualization solution
The adoption of virtualization technology is rising, thanks to hardware cost savings, isolation, and footprint reduction. But choosing a virtualization solution can be intimidating, given the variety of architectures and products available. This article attempts to ease the process of selecting a virtualization solution by posing 10 important questions that any embedded engineer or manager should weigh when considering virtualization.
Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs
A two-part article that focuses on the design guidelines and describes how to implement DDR or DDR2 external memory interfaces using FPGAs via ALTDLL and ALTDQ_DQS megafunctions.
For engineers, no good deed goes unpunished
The loss of engineering prestige is a consequence of having succeeded too well, writes Bill Schweber, editor of Planet Analog.
  GANSSLE'S EMBEDDED POLL: 2010 Job Prospects
What are your job expectations in 2010? To participate go to the poll location on the Embedded.com Home Page .

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