Embedded vision platform builds on low-power FPGAs - Embedded.com

Embedded vision platform builds on low-power FPGAs


Microchip Technology Inc. has announced the Smart Embedded Vision initiative that offers FPGA-centric IP, hardware, and tools for low-power, small-form-factor machine-vision designs across the industrial, medical, broadcast, automotive, aerospace, and defense markets.

This coincides with the availability of the low-power PolarFire FPGAs developed by Microsemi, a Microchip subsidiary. These high-resolution FPGAs offer high-speed imaging interfaces along with an IP bundle for image processing. The image-processing IPs are available for edge detection, alpha blending, and image enhancement for color, brightness, and contrast adjustments.

PolarFire FPGAs provide 30% to 50% lower power than the competing SRAM-based mid-range FPGAs, according to the company. The FPGAs, ranging from 100K to 500K logic elements (LEs) and 5× to 10× lower static power, are highly suitable for compute-intensive edge devices. Moreover, these intelligent systems can be deployed in small form factors with tight thermal and power constraints.

The Smart Embedded Vision offerings include serial digital interface (SDI) IP that is used to transport uncompressed video data streams over coaxial cables. There is also IP for 1.5-Gbits/s-per-lane MIPI-CSI-2, which is typically used in industrial cameras for the sensor interface that links image sensors to FPGAs.

Other IP includes the 2.3-Gbits/s-per-lane SLVS-EC RX image sensor interface IP; 6.25-Gbits/s CoaXPress v1.1 host and device IP for high-performance machine vision, medical, and industrial inspection; and the HDMI 2.0B IP core that supports up to 4K at 60-fps transmit and 1080p at 60-fps receive. The PolarFire family also supports 1-, 2.5-, 5- and 10-Gbits/s speeds over Ethernet PHY to meet the Universal Serial 10 GE Media Independent Interface (USXGMII) MAC IP with auto-negotiation.

A MIPI-CSI-2–based machine-learning camera reference design is also available in addition to the high-speed imaging IP cores and IP imaging bundle. It’s based on the PolarFire FPGA imaging and video kit that uses inference algorithms from Microchip partner ASIC Design Services and is free for designers to evaluate.

All IP, available through the Libero SoC Design Suite , can be implemented on the PolarFire FPGA Video and Imaging Kit . The following IP cores are available today:

  • HD-SDI (1.485 Gbits/s, 720p, 1080i)

  • 3G-SDI (2.970 Gbits/s, 1080p60)

  • MIPI-CSI-2

  • Two-lane SLVS-EC Rx FPGA core

  • 6.25-Gbits/s CoaXPress v1.1

  • HDMI 2.0 4k at 60-fps transmit and 1080p at 60-fps receive

The following IP cores will be supported by the end of 2019:

  • 6G-SDI (5.94 Gbits/s, 2Kp30)

  • 12G-SDI (11.88 Gbits/s, 2Kp60)


  • Eight-lane SLVS-EC Rx

  • 6.25-Gbits/s CoaXPress v2.0

  • HDMI 2.0b 4K at 60-fps receive

The PolarFire Imaging IP Bundle is priced at $1,499. The MPF300-VIDEO-KIT is available for $999.

>> This article was originally published on our sister site, Electronic Products: “Low-power FPGAs target machine-vision designs.”

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