Embedded vision processors optimized for neural networks - Embedded.com

Embedded vision processors optimized for neural networks


The growth in embedded vision systems—systems that extract meaning from visual inputs—is driving demand for more performance- and power-efficient vision-processing capabilities. Many companies have risen to respond to this demand: AMD, CEVA, Imagination, Intel, Nvidia, and various ARM licensees. They use a variety of hardware: FPGAs, FPGA/MPU combinations, graphics processing units, and specialized heterogeneous multicore designs optimized for the task.

Now Synopsys Inc. (Mountain View, CA) has released its alternative solution, the DesignWare EV processor core family (shown below), designed to be integrated into an SoC with any of a number of host CPUs, including those from ARM, Intel, Imagination MIPS, PowerPC and others. It currently includes two members, the EV52 and EV54, optimized for vision computing applications. Fabricated using a 28-nanometer process, the EV52 features a dual-core RISC processor based on the company's ARC instruction set, operating at up to 1GHz. The EV54 features a quad-core implementation offering higher performance than the EV52. Both incorporate anywhere from two to eight programmer configurable object detection engine processing elements (PEs).

Synopsys vision processor combines ARC-based RISC cores with convolutional neural network detection engine processing elements. (Source: Synopsys)

The EV52 and EV54 are optimized for vision computing applications using convolutional neural network (CNN) algorithms, which draw their inspiration from the way humans process visual information. CNNs make use of feed-forward artificial neural networks in which individual neurons are tiled in such a way that they respond to overlapping regions in the visual field. Such overlap is key to the way the human eye tracks movement, recognizes changes in the environment, discriminates between objects, and responds to subtle changes in facial expressions.

In an interview with EE Times, Mike Thompson, Synopsys's senior manager of product marketing for the DesignWare ARC processors, said the EV processor family is designed to perform the CNN calculations at more than 1,000 GOPS/W (giga, or billions, of operations per second per watt), enabling fast and accurate detection of a wide range of objects at a fraction of the power consumption of competing vision solutions.

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