ESC 07 Spring Preview: Making FPGAs more embedded designer friendly - Embedded.com

ESC 07 Spring Preview: Making FPGAs more embedded designer friendly

San Jose, Ca. – At the upcoming Embedded Systems Conference Spring hereembedded developers will be provided with a wealth of useful designinformation on how, when and where to incorporate FPGAs in theirdesigns.

They will need it. As system design complexity increases, the needfor higher levels of integration continues and as the time to marketgets shorter. So, FPGAs and other programmable hardware alternativeshave become a fact of life for most embedded developers.

Despite this, embedded developers continue to have a love-haterelationship with this increasingly necessary hardware building block.Exemplifying these conflicting attitudes is Blake Henry, president andCEO at Bitwise Systems, who will at the conference describe to fellowdevelopers the intricacies of “Designingan FPGA to USB interface” (ESC-214)

“One reason that embedded designers incorporate a Field ProgrammableGate Array(FPGA) into their design is because of the raw processing performancethat FPGAshave to offer,” he said. “FPGAs deliver user programmable wire-speedmultiprocessing capability unequalled by any microcontroller.”

In an FPGA, multiple wire-speed processes can be executedconcurrently and exclusively by the FPGA. No task switching, threads,or interrupts are required. FPGAs give you multiple digital circuitsthat operate in parallel with no interruptions at all.

So at any point in time, he said, an FPGA can concurrently read anADC, update an LCD, write to a DAC, perform part of an FFT and drive avideo display scan line by scan line all at the same time and neverever miss a single clock cycle.”

Because of this, FPGAs are taking on a larger and larger jobs inmany embedded designs, as a number of speakers at the Spring ESC pointout.

“FPGAs provide embedded systems designers with new alternatives forcreating high performance DSP and image processing applications,” saidDavid Pellerin, CTO at Impulse Technologies, who with Ralph Bodenner ispresenting “UsingFPGAs as Coprocessors for DSP and Image Processing (ESC-263).”

According to Gordon Hands, director of strategic¬† marketing atLattice Semiconductor, who is presenting “HighPerformance Image Interfaces In Low-Cost Programmable Logic (ESC-327),”FPGAs and PLDs are increasingly used in display systems to implement avariety of image processing functions.

“This increased usage is driven by the fast time to market andflexibility that programmable devices enable,” he said. “Within displaysystems source synchronous interfaces, which send seven data bits forevery cycle of the clock, are commonly used to transport image data.This approach has been used in devices such as the Texas InstrumentsFlat Link and National Semiconductor Channel Link devices.

“System designers are looking to integrate these source synchronousinterfaces within FPGAs. These increases in display quality mean thatmore data needs to be transferred from more sources to the display.”

According to Vineet Aggarwal, data acquisition product manager atNational Instruments, who with Rick Kuhlman is speaking on “SimulatingSensors on FPGA Hardware (ESC-402),” FPGA-based hardware is idealfor sensor simulation, primarily because of the ability to adapt tomultiple sensor types with precise timing requirements.

“Each sensor output can be customized down to nanoseconds, andvarious signals can be completely synchronized to realistically createa specific state of operation,” he said. “In many cases, however,sensors function independently and update at different rates. The trueparallel nature of FPGAs also allows dedicated blocks of silicon tooperate without any interference from other parts of the application.”

So what's the problem?
With all this going for them, why don't FPGAs yet dominate the embeddedspace?

“In my opinion, one of the key reasons is that today's FPGA designflow is still a digital logic design process,” said Henry. “In short:'It's the design flow, stupid'.

“You can enter your design as schematics or you can use a HardwareDescription Language (HDL) such as VHDL or Verilog, but regardless ofthe design flow you choose, it's still a hardware design process.You're just moving around flip-flops in a sea of gates. All thedisciplines required to design digital logic are still required todesign FPGAs.”

According to Pellerin, the challenges to using FPGAs ashardware-accelerated software platforms have historically included theneed to write low-level hardware descriptions in the form of VHDL orVerilog languages. “These languages are not generally part of asoftware programmer's expertise,” he said. “Other challenges haveincluded deciding how and when to partition complex applicationsbetween hardware and software, and how to structure an application totake maximum advantage of hardware parallelism.”

<>As long as these conditions persist, Henry believes, FPGA basedembedded designs will largely remain limited to those which demand theperformance that FPGAs can deliver and can afford an FPGA designspecialist on the project. But in the view of some presenters at theSpring ESC, considerable progress is being made in this direction.

According to Pellerin, one of the most exciting developments inFPGAs in recent years has been the emergence of hard and softFPGA-embedded processors, including the Xilinx MicroBlaze and PowerPC,the Altera Nios II, and others. But while embedded processors areimportant advances that have made single-chip, FPGA-based systemspractical, he said, there are challenges to using FPGAs as softwareplatforms.

“Software programmers may not have the skills – or indeed, thedesire – to make use of hardware design tools or hardware-orientedlanguages such as VHDL and Verilog,” said Pellerin, and they may bealso faced with design methods that are new and unfamiliar, includingthe need to efficiently partition applications between hardware andsoftware.

“Now, with ever higher FPGA gate densities and the proliferation ofFPGA-embedded processors, there is strong demand for even higher levelsof abstraction. C represents one such method of abstraction, allowingsoftware programmers to access the resources of FPGAs for applicationacceleration, without the need to become hardware designers.”

According to Aggarwal, various model-based design techniques, whencombined with hardware-in-the-loop simulation offer another path to ahigher level of abstraction more compatible with traditional embeddedsoftware design flows.

“HIL simulation takes the dynamics of a real-world environments andmodels them using software to test the performance of a newly designedcontroller,” he said. “This method of using software simulations tovalidate and test control hardware has greatly reduced the time andexpense involved with this stage of the design cycle.”

According to Henry, it is clear that FPGA vendors have taken anumber of measures to educate embedded developers and provide toolsthat make these devices easier to use. Including wide support for sometype of soft processor core that can be instantiated in the FPGA andprogrammed traditionally and tools that convert 'C' to synthesizableHDL, he said that nearly all of the vendors maintain a network ofdesign services providers so their customers can hire out the work on acontract basis.

“So the vendors are addressing the issue,” said Henry. “It will beinteresting to seehow things change in the next few years.”

Among the other papers being presented at the ESC Spring in SanJose, Ca., address issues of how to integrate FPGAs into embeddedsystems designs are “Prototypingand System Design with FPGAs (ESC-342),” by RC Cofer and BenHarding of Avnet, “Designingthe Ultimate System Integration Platform with 65nm FPGAs (ESC-302),”by Navneet Rao of Xilinx; “High-speedsignal processing with FPGAs, CPUs, and DSP (ESC-442),” by D. W.Hawkins from the California Institute of Technology; and “Designingwith Dynamically Reconfigurable FPGAs (ESC-264),” by PatrickLysaght from Xilinx Research.

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