There was a time, not more than a decade ago, that the most compute power an embedded developer could get would be in a single core processor that had been fabricated with a process that gave it better clock rates, better power/performance or raw speed.
But with sub-micron nanometer fabrication, it is now possible to get more than one processor on a single die – many more, in fact. In such designs, the norm has shifted from two or three homogeneous processor cores to dozens. And in some segments, such as high-end consumer devices and mobile phones, the architectures are much more diverse and incorporate heterogeneous many-core elements, mixing graphics, video, and DSP engines with general purpose processors.
Because of the economies of scale that such high volume consumer applications make possible for ARM-based designs in particular, the cost of their use is dropping even as their compute power is increasing. This is opening new markets for heterogeneous ARM designs in embedded market segments, in network infrastructure, and even high-performance scientific computing.
To take advantage of this bounty, embedded developers face a considerable set of challenges, including: (1) determining if a design needs such a solution; (2) if it does, what mix of processor cores to use; (3) the right mix and precise number of processors that can be supported; (4) whether to use tightly or loosely coupled multiprocessors; (5) how and when to use virtual machine hypervisors to manage workloads; (6) how to manage inter-process communications between cores; and (7) which operating system to use: proprietary or open source, or build your own.
As noted in the collection of recent design articles in this week's Tech Focus newsletter , such questions have been the subject of considerable attention and discussion on Embedded.com. For more recent up to date information, particularly in relation to the ARM architecture, I recommend the upcoming the 2014 ARM Technical Conference in Santa Clara in three weeks. Be sure to register to attend if you want an intensive education in the topic.
At ARM Techcon there will be a track of 12 classes on all aspects of using heterogeneous techniques in your next design: which core to use – Cortex-A, Cortex-M, ARMV8, ARM64, Big.little, Neon, or Mali; which programming model to use; and which applications will most benefit from its use. Of these, my pick of classes not to miss are:
The Future of Compute With HSA and ARM
Taught by AMD's Suresh Gopalakrishnan, he will provide a grounding in the Heterogeneous System Architecture (HSA), a hardware/software spec that can be accessed by developers through OpenMP, OpenCL, and Java, etc. He will discuss how to pick the right tools for workload-optimized platforms no matter the application: mobile, embedded, server, and HPC.
Using an ARM Cortex-A and Cortex-M series Heterogeneous Approach
Freescale's Amanda McGregor will provide a comprehensive introduction to heterogeneous multiprocessing (HMP) using ARM Cortex-A and Cortex-M series and the factors that have to be considered, including efficiency of response, system-level integrity, and low-power.
GP and GPU on ARM systems
According to The PTR Group's Michael Anderson, who will be teaching this course, ARM platforms are increasingly coupled with high-performance graphics processor units (GPUs). “However, the GPU can do more than just render graphics,” he points out. “Today's GPUs are highly-integrated multicore processors in their own right and are capable of much more than updating the display.” In his class, topics will include the rationale for harnessing GPUs as compute engines and their implementations and the various tools that can be used including NVidia's CUDA, OpenCL and RenderScript, among others.
To complement the courses at ARM Techcon, this week's Tech Focus newsletter contains a subset of numerous articles on Embedded.com on related topics, of which my Editor's Top Picks are:
SAVE: Towards efficient resource management in heterogeneous systems
Addressing the challenge of exploiting specialized computing resources of a heterogeneous system architecture (HSA) by pooling them and taking advantage of their individual characteristics.
The Convergence of HPC and Embedded Systems in Heterogeneous Computing
An assessment of heterogeneous computing and its impact on high performance computing in many embedded systems designs.
High Level Programming for Heterogeneous Architectures
Evaluating AMD's APARAPI Java-based heterogeneous multicore programming environment using some real world algorithms.
Dynamic Partitioning-based JPEG Decompression on Heterogeneous Multicores
A run-time partitioning and scheduling scheme for use on heterogeneous multicore designs that exploits task, data, and pipeline parallelism.
While my plans are still unclear, if I attend ARM Techcon I will be available to embedded systems developers to talk about what they would like to see on Embedded.com and articles or blogs that you might want to publish on the site. If that is not possible, give me a call or drop me an email.
( Editor's Note : On Tuesday, Sept. 9, 2014 Eastern Time, Honeywell Sensing & Control and Arrow Electronics experts will host a 60 minute webinar regarding new nanopower Anistropic Magnetoresistive Sensor ICs in SOT-23 packaging . )
Embedded.com Site Editor Bernard Cole is also editor of the twice-a-week Embedded.com newsletters as well as a partner in the TechRite Associates editorial services consultancy. He welcomes your feedback. Send an email to , or call 928-525-9087.