Fall ESC08 Boston Preview: Maybe it's time to do without (debug interface pins) - Embedded.com

Fall ESC08 Boston Preview: Maybe it’s time to do without (debug interface pins)

San Jose, Ca .- If Renesas's David Johnson has anything to do it, very soondevelopers of applications on limited pin count MCUs will take theircues fromthe badge-averse bandit in the movie “Treasureof the Sierra Madre.”

In his class at the Fall ESC in Boston on “Zero Wire Debugging Using InductiveTechnology (ESC-320),” he will describe inductive couplingtechniques that may eventually allow developers to say: “we don't needno stinking debug interface pins.”

Using short range inductive technology, he says, earlydemonstrations at Renesas show that this approach (Figure 1 below ) can be an effectiveway to achieve in-system on-chip debug for very-low pin countmicrocontrollers. “While this is still a research and developmentproject, it holds great promise for the future of embedded systemdebugging,” says Johnson.

Figure1: A zero-wire debugging interface is created between two circuits viaa common magnetic field using two inductive coils, one inside thepackage of the device to be debugged; the second in a flexible probeattached to the top surface of the package. (Source: Renesas)

Embedded system designers have been doing in-system debug since theearly days of microprocessors. The tools have evolved from simpleflashing LEDs to the point where on-chip debug is now the norm.However, as the trend toward low-pin count MCUs picks up, he says, itbecomes more difficult to justify the overhead associated withdedicated debug pins.

As a result, numerous efforts have been made recently to come upwith a variety of alternatives for low pin-count MCUs. Some vendors -such as ARM with its Serial Wire and TI with its Spy Bi-Wire – have reduced the five-pin JTAG connection to asingle bi-directional channel and clock. Others ” such as Renesas withits R8C/Tiny and Freescale with its Background Debug Mode ” havedeveloped their own non-JTAG single pin interfaces.

“Yet even single wire debug has some overhead,” says Johnson.”Consider an 8-pin micro package. After excluding power and ground,only six application pins remain. Designating one pin for debug reducesI/O availability by 17%!

There also board layout limitations to deal with as well, sinceadditional routing and connectors have to be included on a printedcircuit board to access the debug port. “While small packages are anatural fit for miniaturized end applications, there may be no spaceleft for a debug connector,” says Johnson.

In the prototype design being developed at Renesas, inductivecoupling links two ICs via a common magnetic field generated byinductive coils: one fabricated outside the device package and thesecond in a flexible probe that is attached to the top surface of thepages (See Figure 1 above )

The transmission scheme uses bi-phase, pulse-based modulation, whichruns at a faster data rate than carrier-based modulation. A specialprobe IC conditions the signals to modulate and demodulate the datapassed to and from the target MCU. It also removes noise from thereceived signals.

According to Johnson, initial studies indicate that the cost ofadding an inductive interface to the target LSI is of the order of 0.1cent per channel, since the pulse transceiver circuit is very small andthe antenna can be formed in the top metal layer only.

The combination of the flexible circuit inductors and the probe ICis also cost-effective because the inductor pattern can be optimallycustomized for the target LSI while the probe IC can be designed forgeneral use.

While work on the inductive debug interface is still in the researchand development stage, Johnson admits there are a number of issues thatmust be overcome, such a probe alignment tolerances.

Despite that, he says that the goal of the next R&D phase is toadd data transmission channels to provide a bus trace output, using afull bus trace (address, data and status signals) with three trace datachannels and parallel-to-serial conversion. “By increasing thecommunication channel's clock frequency, a full bus trace for a 10MHzmicrocontroller can be achieved,” he said.

To attend this and otherinformative classes sign upnow on the ESC registration page .

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