The Scandinavian-based series of FPGAworld conference is being extended with an event in Munich which has been prompted by the support of Altium.
The technical events for FPGA engineers have taken place in Stockholm and Copenhagen for six years the German event will take place in the Commundo Tagungshotel Ismaning near Munich on September 10.
The FPGAworld Conference addresses all aspects of digital and hardware/software system engineering on FPGA technology. It is a discussion and network forum for researchers and engineers working on industrial and research projects, state-of-the-art investigations, development, and applications.
“It has been our wish for many years to expand FPGAworld to Munich but this has been hard without a strong local partner,” said David Källberg, co-founder and publicity chair of FPGAworld. “When Altium approached us last year, both parties shared the same interest in creating a non vendor specific event for German engineers with a special interest in FPGAs.”
The next release of Altium Designer, which is scheduled to launch in the run up to FPGAworld, will feature Aldec's OEM simulator as the default VHDL or Verilog FPGA simulation technology.
This adds an extra dimension for electronics designers working with FPGAs and provides high-quality RTL simulation capability and seamless integration with industry proven VHDL and Verilog simulation from Aldec, tightly integrated within Altium Designer.
“We are happy to have helped FPGAworld find its way to Germany, giving everybody interested in FPGA technology an excellent place to meet and learn about the latest developments, said Frank Krämer, Technical Marketing Director EMEA, Altium Europe. “For Altium, the event is a very good platform to demonstrate the outstanding capabilities we offer with Altium Designer and our FPGA hardware platforms to develop and easily verify complete FPGA based embedded systems.”
Altium will also be hosting a technical session entitled 'A complete embedded design from the scratch in 30 minutes with Altium Designer' demonstrating an easy way of designing – top-down on a very high abstraction level – complex and wishbone based embedded systems on FPGA.