LONDON The Embedded Microprocessor Benchmark Consortium (EEMBC) has released its first openly-available benchmark. Traditionally EEMBC benchmarks focus on specific embedded market segments and provide real-world performance of embedded processors.
CoreMark 1.0 provides a starting point for measuring a processor's core performance and basic pipeline structure and can be used to evaluate processors ranging from 8-bit microcontrollers to high-end 32-bit devices and architectures.
EEMBC benchmarks, including CoreMark, are defined by EEMBC members and are tested on a variety of platforms prior to release with the intention of establishing an industry standard.
The CoreMark workload contains several commonly used algorithms that include matrix manipulation to allow for the use of multiplier accumulate (MAC) and math operations, linked-list manipulation to exercise the use of pointers, state machine operation (common use of data dependent branches), and cyclic redundancy check (CRC).
Use of the these algorithms are designed to deliver a realistic mixture of read/write operations, integer operations, and control operations.
“Similar to the infamous Dhrystone benchmark, CoreMark is free, small, and easily portable to most systems,” said Shay Gal-On, EEMBC director of software engineering. “However, unlike Dhrystone, CoreMark is not susceptible to a compiler's ability to optimize the work away and is governed by consistent run and reporting rules.”
EEMBC has set up a website for the distribution of CoreMark source code and the publication of scores. CoreMark users are being encouraged to enter their scores and platform configurations on this website. This publicly available list of scores will allow users to make quick comparisons between processors.
An EEMBC EnergyBench enabled version of CoreMark is available to all EEMBC members and may also be licensed separately by non-member companies. EnergyBench provides data on the amount of energy a processor consumes while running EEMBC's performance benchmarks.
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