Hardware-controlled brushless DC motors ease the burden on CPUs

In “Hardware-controlled brushless dc motors ease the burden on CPUs,” Triton Hurd and Isaac Sever of Cypress Semiconductor describe a method of hardware-only motor commutation that offloads the CPU from the burden of maintaining a motor’s speed, freeing it to perform other functions, such as RF communication, data encryption, or 3-D-position calculations.

The technique is most useful when the motor control subsystem must deal with constant high-priority interrupts that increase in frequency as the speed of the motor increases, taxing the capabilities of the MCU.