Hardware/software co-design is getting easier (or less hard) - Embedded.com

Hardware/software co-design is getting easier (or less hard)


Although many embedded developers may find it hard to believe, both hardwareand software development is getting easier, or at least less hard. This isdespite the increasing complexity of advanced system-on-chip designs andsoftware code bases that in many application domains, such as automotive,is approaching 100 million lines of code.

This is especially true of hardware/software co-design where new virtualprototyping and transaction level modeling (TLM) tools from EDA companiessuch as Cadence, Synopsys and Mentor Graphics move into some segments ofembedded systems design in a big way. All of these companies and others willbe reporting on these and other methodologies at the 2013Design Automation Conference this week. 

The initial impact of these tools will be on the designers of hardware description language-based SoCs, as these tools allow them much more flexibility to experiment. They can tryout circuit ideas with the same ease, relatively speaking, that a board developerhas had in laying out the essential hardware components of a design to seeif it works.

In this week’s Tech Focus Newsletter on “Embedded SoC tools,tips and tricks, ” are some articles from hardware and software developersdescribing their experiences with SoC design. In addition, included beloware several other articles from hardware SoC designers on the tips, tricksand workarounds they came up with using the new tools:

Configurable dividers for SOC- and block-level clocking
Dealing with multi-Vt & multi-voltage domain inversion challenges
High frequency SoC synchronizer design with programmable MTBF
Minimize leakage power in embedded SoC designs with Multi-Vt cells
Reducing signoff corners to achieve faster 40 nm SOC design closure

But just as profound will be the changes such tools bring to the softwaredevelopment side. According to a recent study there has been a 17-fold increasein software development for complex 16/14nm designs compared to 90nm. Illustrativeof how such new virtual prototyping, and TLM based SystemC tools will notonly make complex software designs less arduous, but make it easier to integratethem with the hardware design are a number of hardware/software co-designarticles published on Embedded.com:

Using SystemC to build a system-on-chip platform
Use virtual prototyping to boot Linux on a Cortex A15 SoC core
Android hardware-software design using virtual prototypes
Leveragingvirtual hardware for embedded software validation
Embedded HW/SW co-verification basics

For an up-to-date understanding of the new hardware/software developmenttools and methods in the works be sure to check out the embedded action atthe 2013Design Automation Conference  in person or on line, where thereare numerous paper presentations and panel sessions devoted to topics ofinterest to embedded system developers.

Embedded.com Site Editor Bernard Cole is also editor of thetwice-a-week Embedded.comnewsletters as well as a partner in the TechRite Associates editorialservices consultancy. He welcomes your feedback. Send an email to , or call928-525-9087.

See more articles and column like this one on Embedded.com. Signup for the Embedded.com newsletters .Copyright © 2013 UBM–All rights reserved.

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.