San Jose, Ca. – Tensilica has added support for Avnet's Xilinx Virtex-4 LX200Development Kit for high-speed hardware-based simulations of their Xtensa configurable and Diamond Standard processor families.
Using it software developers can choose between the lower cost LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimization processes.
The Tensilica software developers' toolkits (SDKs) ” consisting of an IDE (the Xtensa Xplorer integrated design environment), code development toolchain, and Tensilica's instruction set simulator (ISS) ” will work with either Avnet FPGA board.
The software tools include libraries that enable software developers to usestandard C library functions such as print to print out to the host PC and read/write from the hard disk of the host PC.
Designers using Tensilica's processors can use the Avnet Virtex-4 DevelopmentKit to gather extensive hardware-based profiling information, which generates an execution profile of the program, which quickly pinpoint execution hotspots. This profile can be viewed graphically within Tensilica's Xtensa Xplorer IDE.
Using feedback compilation, a developer can set a flag so statistics can be collected on the number of times branches (loops, jumps, etc.) are takenor not taken during execution on the Avnet Xilinx Development Kit board.
The Xtensa C/C++ compiler then uses these run-time generated statistics andrecompiles the program to optimize (a) for speed by placing most frequently taken branches in straight-line code, and (b) for code size by compiling less frequently executed routines for code size rather than speed. The feedback-basedcompilation method speeds up applications between 5 to 15 percent and reduces code size by up to 15 percent, according to the company.
The Avnet Xilinx Virtex-4 Development Kits are available directly from Avnet. Precompiled FPGA bitstreams that support the LX60 and LX200 boards are available for Diamond Standard processor family, starting at $3000.