Applications like 4G baseband modem require single-chip implementation to meet the integration and powerconsumption requirements. These applications demand a high computing performance with real-time constraints, low-power consumption and low cost.
With the rapid evolution of telecom standards and the increasing demand for multi-standardproducts, the need for exible baseband solutions is growing. The concept of Multi-Processor System-on-Chip (MPSoC) is well adapted to enable hardware reuse between products and between multiple wireless standards in the same device.
Heterogeneous architectures are well known solutions but they have limited flexibility. Based our the experience of two heterogeneous Software Defined Radio (SDR) telecom chipsets, this paper presents the homoGENEous Processor array (GENEPY) platform for 4G applications. This platform is built with Smart ModEm Processors (SMEP) interconnected with a Network-on-Chip.
The SMEP is implemented in 65 nm low-power CMOS and can perform 3.2GMAC/s with 77 GBits/s internal bandwidth at 400MHz. Two implementations of homogeneous GENEPY are compared to a heterogeneous platform in terms of silicon area, performance andpower consumption. Results show that a homogeneous approachcan be more efficient and flexible than a heterogeneous approach in the context of 4G Mobile Terminals.
We address two issues throughout the two implementations. The first is to design a reconfigurable processing unit capable of supporting all algorithms of our LTE applications. The second is to implement fully distributed and flexible control mechanisms to support synchronization and dynamic reconfiguration.
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