How FPGAs, multicore CPUs, and graphical programming are changing embedded design -

How FPGAs, multicore CPUs, and graphical programming are changing embedded design


Editor’s Note: In this Product How-to article , Sanjay Challa of National Instruments provides an overview of how the combination of FPGAs, multicore CPUs and graphical programming environments such as the company’s LabVIEW are changing the nature of embedded systems design.

Embedded systems consist of hardware and software components designed to perform a specific function, and often have real-time and/or reliability constraints which go far beyond everyday computing.

To meet these demands on a hardware level, traditional embedded systems generally incorporate microcontrollers, digital signal processors (DSPs), and/or field programmable gate arrays (FPGAs). With regards to software, different languages or tools are traditionally required to program or configure each hardware element. As a result, traditional embedded design teams require members with a diverse multitude of proficiencies in hardware and software design capable of integrating the hardware and software in typical embedded systems.

With the explosion of embedded devices in the past few decades, many improvements have been made in both the hardware components and software tools. However, despite the innovation and growth of both software tools and hardware components, traditional embedded system design approaches have evolved little if at all and are increasingly proving to be a hurdle. Given the increasingly rapid growth of new standards and protocols as well as growing pressure on design teams to deliver to market more quickly, embedded system design is due for a disruptive change in paradigm.

To better understand the need for a revolution in embedded system design, it’s useful to consider the current process and tools. Based on a recent study of the embedded space by UBM Electronics in conjunction with EE Times and Embedded System Design, there are clearly established roles and processes in embedded system design.

To begin, an embedded system design team is on average composed of 13.5 members, in which 62% are devoted to software resources while the rest are focused on hardware development. This pattern in embedded design team structure and function has been constant over the last half decade.

Looking deeper into embedded projects, 43% are focused on developing something brand new while the remaining 57% are upgrades to existing embedded systems. The primary reasons for an upgrade are for the addition/incorporation of new or different software features and a new or different processor. On average, projects take 12 months to complete and in 2011, a staggering 57% of projects finished late or were cancelled. Furthermore, design teams reported reusing 87% of existing code, which encompasses code developed in house, acquired from open-source work, and/or purchased. These trends in embedded projects have also been extremely consistent year to year for the past half decade.

Beyond the traditional embedded design team and project, it’s also useful to note the typical design process. Once the system architecture is defined based on the specifications for the embedded system, hardware and software design teams generally begin their work separately. The hardware engineers develop the hardware architecture, synthesis, and physical design of the system.

The software engineers work to develop application software, compilers, and in some cases the operating system. As the hardware and software teams complete their work, there is an integration effort in which software drivers are developed to hardware interfaces. This integration effort is an iterative process, often resulting in updates to software drivers and/or hardware interface synthesis.

Given the current state of embedded system design, there is a clear need for change to sustain continued innovation while maintaining quick delivery of products to the marketplace. This need is underscored by the fact that the majority of respondents to the UBM/EE Times survey reported that their job function involves contributing to firmware or hardware and software integration.

With the accelerating growth of advances in hardware technologies and software tools, the challenge posed by integration is set to rise. This challenge, if unaddressed, will result in more expensive end products and can prevent experimentation, growth, and delivery of more innovative designs to the marketplace.

Standard embedded architecture
Standard hardware architecture eliminates much of the integration effort otherwise required. While a standard architecture may seem too restrictive for the embedded space at first, the standardization of hardware in desktop computers serves as a good model for comparison. Instead of limiting the applicability of processors for everyday computing, a standard architecture instead made it possible for developers to focus on their competencies and specialize in delivering better hardware and software components to the marketplace.

As a result of the standardization, the general computing marketplace benefited from more robust operating systems, more refined end applications, and advances in the underlying hardware components. The lesson learned is that time saved in avoiding the integration effort of custom hardware architectures and associated software components results in better end solutions which are delivered to market faster.

The standard architecture for the embedded space needs to be flexible enough for adaptation to diverse use cases and while providing an avenue for updates. Given these constraints, the most robust architecture for standardization in the embedded design space is a microprocessor and an FPGA working alongside each other as a single unit.

Together, these two elements enable substantial flexibility in designs. There are already examples of this architecture, which will revolutionize embedded design, that have entered the market such as Xilinx’s Zynq chip, Actel’s SmartFusion chip, and National Instruments reconfigurable I/O (RIO) hardware products.

Figure 1: Standard Hardware Architecture for Embedded Design: The combination of a processor and an FPGA enables unparalleled flexibility while making it possible for standardization that can usher higher level tools to bring substantial gains in embedded design workflow. The processor makes it possible to reuse existing code libraries while the FPGA allows for the flexible implementation of custom algorithms.

A key benefit of a standard architecture is that more capable and optimized high-level tools can be developed and used for design. In turn, more complex products can be pushed to market sooner with smaller design teams. This transformation is made possible because domain experts can leverage higher level tools to get more involved with embedded design while eliminating the work of integrating various hardware and software components.

Benefits of FPGA technology
To better understand the utility of the standard architecture, it is important to clarify the benefits of an FPGA in embedded design. At a high level, FPGAs are reprogrammable chips which implement custom hardware functionality. The rise of higher level design tools has made it possible for those without deep experience with digital hardware design to take advantage of FPGA technology. FPGAs offer the benefits of hardware determinism and reliability without the upfront cost and rigidity of ASIC design.

Additionally, FPGAs provide an advantage over multicore processors that execute far fewer instructions in parallel than what is achievable on existing FPGAs, and which require more sophisticated driver and software stacks resulting in diminished reliability in comparison to FPGAs.

These benefits make FPGAs an ideal hardware element for rapid prototyping and for achieving high performance in embedded design. FPGA technology provides designers a quicker path to market at lower cost. Addtionally, the ability to load new logic and redefine the connections in the FPGA fabric makes it possible for designers to future proof designs and benefit from more robust updates without requiring any substantial modifications to hardware.

Industry examples
The combination of processors and FPGAs in embedded system design is growing in many industries. One example is ePower Technology, a company located in Denmark which designs embedded control systems for muscle testing and training equipment. The SYGNUM energy training system they developed utilizes a patented five-phase motor to offer smooth control when applying force resistance during exercise motions. ePower Technology use FPGAs to handle the high-speed control loops that maintain velocity and position setpoints as a processor runs a real-time operating system to handle lower frequency control loops.

Another example of the standard architecture can be found in the energy industry. Xtreme Power is a U.S. based company that designed a distributed energy storage system involving embedded control and based on several processors and FPGAs. The FPGAs are used to take accurate, high speed measurements of three-phase power and run advanced algorithms to determine how to best respond to instabilities on the power grid. Meanwhile, the processors provide Ethernet communication to other distributed nodes and facilitate remote data access, system management, and diagnostics.

Higher level tools
In addition to standard hardware architecture, higher level design tools are also instrumental in addressing the growing challenges in embedded design. Higher level tools make it possible for domain experts to be more closely involved in embedded system design with smaller and more efficient design teams.

The general purpose computing provides evidence for the efficiencies which can be gained in application development with higher level design tools and languages. Unsurprisingly, the embedded marketplace has started to witness the growth of higher level design tools including the Xilinx AutoESL C-to-Gates high-level synthesis tool, Mentor Graphics Catapult C Synthesis tool, and the NI LabVIEW ultimate system design software.

The shift to smaller design teams composed of domain experts and system architects is made possible by higher level design tools and results in a much more efficient development process. Traditional embedded design teams, as previously discussed, are much larger and contain many more specialists such as FPGA designers, ASIC designers, Custom IC designers, software designers and more.

Such large teams struggle to execute all design needs in parallel. Additionally, each group of specialists must understand the problem and requirements of the domain experts as it relates to their specialization before they can execute on the requirements. As a result, traditional design teams struggle given that requirements often change because of the difficulty in mapping market requirements into system features and because of the challenges in communication between domain experts and design specialists.

More industry examples
There are a number of valuable industry examples that illustrate the power of higher level design tools and smaller design teams. One such example includes Ventura Aerospace Inc., a small company that services the airfreight industry with rigid cargo barriers and fire suppression technology. Ventura Aerospace opted to rely on a small team of domain experts and system designers along with NI LabVIEW graphical system design software and NI RIO hardwareto develop an innovative fire suppression control system for FedEx

By using the NI LabVIEW RIO architecture, composed of NI’s graphical system design software and RIO hardware, the team from Ventura Aerospace was able to deliver a more affordable, higher quality solution faster than much larger competitors (Figure 2 below). The success of the Ventura Aerospace design team provides compelling proof that small teams can be more efficient and gain market share against more entrenched, traditional design based competitors when using the right tools. This example also illustrates the power of high level system design software operating in conjunction with a standard hardware architecture.

Figure 2: Ventura Aersospace was able to create a higher quality, more affordable fire suppression control system solution for FedEx – faster than its competitors – by working with a small team of developers and using both high level design tools and commercial off the shelf hardware along with the standard architecture of a processor and FPGA from National Instruments.

Another measure of success with small teams can be seen in the growing number of smaller, more innovative companies as well as the assets being acquired by larger, more traditional competitors.

One such example with embedded design is the sale of OptiMedica’s retina and glaucoma assets to Topcon. OptiMedica is a small startup company based in California and has been successful in building an innovative ophthalmic medical device using FPGA based hardware and graphical system design tools from National Instruments.

Topcon is based in Tokyo, Japan, established in 1932, and is one of the world’s leading manufacturers of ophthalmic, optometric, GPS, and positioning control systems. The sale of OptiMedica’s retina and glaucoma assets to Topcon is an indication of the success achievable in an established industry by a small team using FPGA based hardware in conjunction with system design tools.

The next step in embedded design tools
The next step in the evolution of tools for embedded design is in the integration of standard hardware architecture with high level system design tools, which eliminates middleware development.

One example of an integrated hardware and software platform in the embedded space is National Instruments LabVIEW RIO architecture. Such integrated platforms combine the strengths of standard hardware architecture with the benefits of high level system design tools. The future of embedded system design is in such integrated platforms, which make more cost effective and rapid innovation possible.

Sanjay Challa is a product manager for embedded software at National Instruments with a focus on real-time operating systems (RTOS) and FPGA-based embedded systems. He joined National Instruments in 2010 as a member of the Application Engineering department. Within the last year, Challa transitioned into his current role where he has a special focus on the messaging and strategy around the security and deployment of NI RTOS hardware. Challa received his bachelor’s degree in biomedical engineering from the Georgia Institute of Technology.

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