How to test your board and system designs for PCIe compliance and interoperability - Embedded.com

How to test your board and system designs for PCIe compliance and interoperability

Compliance Workshops, which include training sessions on the latestPCIe specifications and compliance testing for products, are the lastof several steps in the PCI-SIG process for compliance andinteroperability.

Building interoperable products requires a solid specification suchas PCI-SIG interconnect specifications,which have been widely adopted in different markets in the last 15years. Less obvious though are the test specifications generated byPCI-SIG workgroup members, which correspond directly to theinterconnect specifications.

Assertions from the test specifications yield test definitions,which begin the objective process of validating a component'scompliance with the interconnect specification. When testspecifications are determined, a series of hardware and software toolsare created to apply the tests in a real-world environment.

The tools are run against member developed systems, add-in cards andsilicon, and then carefully checked for correctness. Then, the testtools are approved for official use in determining product complianceand become part of subsequent Compliance Workshops.

Up to four different major areas are tested at a PCIe ComplianceWorkshop. Three different dedicated hardware boards and severalsoftware tools are made available to PCI-SIG members to help themvalidate these areas (Figure 1, below ).

Figure1: Compliance base board, compliance load board and protocol test cardtools are used to validate if PCIe products comply with specifications.

PHY layer.All components are tested at their PHY layer, the electrical signallingat the heart of PCIe. For motherboards, the compliance load board (CLB)is used to connect an oscilloscope to PCIe slots with different widthmeasurements. For add-in cards, the compliance base board (CBB)provides a corresponding connection.

Data captured with the oscilloscope is run through software providedby PCI-SIG to analyze the eye pattern, jitter and bit-rate of thecomponent (Figure 2 below). These tests verify that PCIe componentshave the correct transmitter eye diagram and signal amplitude requiredfor interoperability.

Linkand transaction layers. Components are also exercised at thepacket level, with various errors injected and responses analyzed.Different protocol details and boundary conditions such as reservedfields, bad CRCs, duplicate packets and the like are also checked. Theprotocol test card (PTC) in Figure 1 and its associated softwareprovide this function for both motherboards and add-in cards.

Figure2: SIGTEST Software, which is provided by PCI-SIG, analyzes the eyepattern, jitter and bit-rate of PCIe components.

Configuration space.Every PCI device has a special address space for configuration andcontrol mechanisms. The PCIe Configuration Test Software tool analyzesand tests this aspect of each PCIe component.

Specific register characteristics are checked, as well as anyimplemented optional features such as advanced error reporting anddevice serial number. Every component is checked to ensure it supportsthe required PCI power management functions.

Platform BIOS testing. PCIemotherboards undergo one more set of tests designed to validate thatthe system BIOS correctly configures and provisions PCIe components.

The PTC and software are used here to emulate a more complexhierarchy of PCIe devices that can be physically plugged into thesystem being tested. Memory and I/O address space allocation is tested,along with provisioning and configuration of PCIe switches.

The specifications, procedures and tools listed are made availableto and are used by PCI-SIG members in their own labs before bringingtheir products to a Compliance Workshop.

One aspect of the actual Compliance Workshop is very difficult andcostly to reproduce elsewhere – the interoperability testing of PCIproducts with other member products. For example, at the lastCompliance Workshop in Taipei, 16 systems and 90 addin cards werepresented.

Moreover, the PCI-SIG provides several “Gold” systems that havebeen determined to be fully compliant and provide a good platform foradd-in card testing.

Generally, testing at a Compliance Workshop focuses on systems. Eachsystem has its own setup and has add-in cards rotating among them.Pre-registration for the event is essential so that PCI-SIG can createa schedule that maximizes the number of add-in cards and systems testedagainst one another.

The PCI-SIG has run Compliance Workshops with over 24 systems andaccommodated all necessary testing. This testing capacity is achieveddue to the type of testing structure implemented in the ComplianceWorkshops. PCI-SIG “Gold” systems and addin cards are also incorporatedinto the schedule, so every addin card is guaranteed to test with eachrequired “Gold” system and similarly, every system is guaranteed totest with each required “Gold” add-in card.

When an add-in card arrives at a system suite for interoperabilitytesting, the card is installed and the system is booted into a Windowsor Linux environment.

Participants verify that the card is detected and configured thenthey demonstrate the functionality of the card. This functionality testis specific to each type of card, but generally consists of basicoperations such as file copies, network connectivity or amanufacturer-specific diagnostic routine.

Each system and add-in card maintains a test sheet, which is signedby all participants, showing the pass/fail status of each test in whichthey participated.

At the conclusion of the event, PCI-SIG analyzes the test sheets todetermine which products are eligible to be included in the IntegratorsList.

Another feature of a Compliance Workshop that cannot be realizedin-house is the opportunity for engineers to network with colleaguesfrom other companies.

Confidentiality is certainly a concern expressed by members. Forthis, there are processes in place to ensure that unauthorizedpersonnel are not present during test sessions. Moreover, allparticipants are bound by PCI-SIG confidentiality rules.

Despite the presence of unreleased prototypes for testing andvarious competitors in the same building, the environment is veryhealthy. Engineers from competing companies help each other. Wheninteroperability tests fail, the participants are willing and able tospend extra time – sometimes beyond normal working hours – and worktogether to determine the cause of the failure.

Richard Solomon is Vice Presidentof the PCI-SIG. To read a PDFversion of this article go to “Testyour products for PCIe compliance, interoperability.”

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