"Hybrid" Engine Powers Universal Submodule For Embedded I/O flexibility - Embedded.com

“Hybrid” Engine Powers Universal Submodule For Embedded I/O flexibility

Off-the-shelf components are nothing new to embedded system designers.But no one realistically expects a one-choice-fits-all solution,especially where complex I/O requirements are involved.

But a new implementation of cost-effective field-programmable gate-array (FPGA) technology built on popular mezzanine card formats is deliveringthe best of both worlds ” in terms of affordable standard hardware andfreeform I/O versatility ” for VME , PCI, CompactPCI and standalonesystems.

The engine that makes such versatility possible is the universalsubmodule (USM) concept ” an open-system approach built around astandard mezzanine card format outfitted with FPGA capability and aversatile plug-on module to map unique I/O signals from the customizedFPGA to the standard mezzanine card connector. It uses common hardwareand software building blocks to execute a solution, but leaves theassignment of hybrid I/O needs to the discretion of the embeddedsystems developer.

For system designers facing the crunch of time constraints or costlimitations, this approach offers better economy and a shortertime-to-market for initial implementation. It can also be far-reachingin terms of its advantages and impact on hardware, programming,implementation and longevity based on:

* Availability. The abilityto use readily available standard mezzanine cards, FPGAs andintellectual property (IP) cores minimizes procurement delays,regardless of I/O configuration requirements.

* Versatility. The inherentflexibility of the FPGAs makes the universal submodule concept capableof delivering extremely diverse solutions.

* Upgradeability . Thefreedom to upgrade programming, on the fly and in the field, isparticularly advantageous for applications still evolving, or forsituations where re-programmability, reusability or upgradeability arekey concerns.

* Portability. Thecapability to share FPGA programming and universal submodules ” evenacross different mezzanine card formats ” minimizes issues of hardwarecompatibility and hardware component obsolescence.

The building blocks of the USMconcept
The intent behind the universal submodule concept is to avoid having toreinvent the wheel on every embedded system design in order toaccommodate unique I/O requirements. Establishing a standardizedmezzanine card platform to implement versatile FPGA capabilities makesit easier for embedded systems designers to assign the unique I/Ofunctionality required for each application.

Such versatility and affordability offers numerous advantages for abroad base of data-intensive applications ranging from test andsimulation systems to industrial automation and telecom to monitoringand control functions in mobile applications.

This modular approach complements plug-in compatibility withopen-ended application flexibility to provide affordable power andcontrol during initial application development, and subsequently, forpotential upgrades in the field. It is designed around four keybuilding blocks:

Building Block#1: Mezzanine cards. There's nothing new about using mezzaninecards to handle I/O functionality for custom embedded applications. Butwhat is different about the USM concept is that a standard mezzaninecard concept executed in one of four available formats ” PMC,conduction-cooled PMC, M-Module and XMC ” is capable of beingprogrammed to handle any combination of up to 46 independent I/Osignals.

That approach provides economies of scale for mezzanine cardproduction, simplifies ordering and inventory requirements and buildson a common platform that makes subsequent implementations easier. (Figure 1 below. )

Figure1. The open system standard for the USM concept encompasses fourmezzanine card formats – M-Module, XMC, PMC, and conduction-cooled PMC.Each format accepts the same USM plug-on module that can help extendfunctionality developed for one USM mezzanine card cross-platform toany of the other three formats.

Building Block#2: FPGAs. One thing that makes the implementation of FPGAs sopractical within the universal submodule concept is their shrinkingcost in relation to their processing capabilities. FPGAs have longoffered an option for versatile programming configuration of a hardwareformat.

But it is the evolution of a more affordable cost structure forFPGAs that has made the universal submodule concept cost-effectiveenough to earn consideration by budget-strapped designers. An FPGA with100,000 logic elements (LE) cost around $1,000 just a decade ago, butcan now be down to just $100, helping FPGAs compete with thecost-efficiency of RISC and CISC processors.

Also, it is easy to update the functionality of FPGAs in the fieldwithout any mezzanine card hardware modifications. And that FPGAprogramming easily transfers to other mezzanine cards, if necessary.This reduces concerns about having to upgrade the mezzanine card orstart from scratch due to component obsolescence, because thefunctionality is tied to the programming of the FPGAs and not tied tothe hardware configuration of the original mezzanine card.

Building Block#3: IP cores. While specific I/O requirements for sensors,communications and feedback loops can change from application toapplication, many of the functionalities needed for signal processing(such as interfaces or controllers) are common. Implementingappropriate IP cores in various combinations enables systems designersto configure the necessary functionality for their unique applications.

The availability of common core functions from a variety of sources” including public domain sources (such as www.opensources.com),as well as individual board and component vendors ” saves time andmoney in application development. It also offers system developers aquicker, easier option to do their own implementation, or to contractit to one of their vendors or an independent third party, if theydesire.

Building Block#4: Plug-on universal submodules. The function of the USMplug-on module enables the system designer to map the specificconnections between the FPGA and the SCSI 2 connector mounted on theend of each mezzanine card module.

The line drivers related to the specific functions of the IP coreson the FPGAs are decoupled from the mezzanine card module and areimplemented on the USM module that simply plugs onto a correspondingmezzanine card main module. The plug-on module supports data transferrates up to 20 Mbits per second.

The mechanical setup of these plug-on modules, as defined within theuniversal submodule open standard, utilizes the same 67.0 mm by 43.5 mmmodule card and the same connector spacing for interchangeablecompatibility among any of the four available mezzanine card formats.That physical set-up also provides space for additional electronic andmechanical components (within the limitations of the differentmezzanine card format standards).

Piecing the puzzle together
USM main module mezzanine cards include FPGAs with up to 33,000 logicelements, up to 8 MB of non-volatile Flash, 32 MB SDRAM memory, and 46available pin connections between the FPGA and the USM plug-on moduleon each mezzanine card. A 50-pin SCSI 2 receptacle connector on thefront panel of the mezzanine card provides peripheral connections forthe various I/O signals.

The hardware configuration of the FPGA is loaded during the bootphase from an on-board Flash memory containing the source code for aminimum configuration of the FPGA. Once the FPGA is programmed with thebasic configuration, the hardware configuration for the applicationitself can be loaded into the second area of Flash memory, for examplevia the PCI bus. The soft-core processor also implemented in the FPGAcan provide local intelligence where needed.

As with other commercially available off-the-shelf (COTS) solutions,easy implementation is an important consideration for the success ofthe universal submodule concept. To simplify that implementation,development kits are available for the two basic mezzanine cardformats, PMC and M-Module.

These kits enable users to turn very specific I/O requirements orindividual functional combinations not available as a standardconfiguration into a fully configured product solution, quickly andeasily. (Figure 2 below .)

Figure2. Universal submodule developer's kits for each of the four mezzaninecard formats include everything necessary to implement a unique I/Oapplication ” including a bare USM plug-on module and a test board tointerface with the customized I/O signals from the FPGA.

Each kit contains a standard mezzanine card in the chosen format, anFPGA package, a blank USM plug-on module, a test board where I/Osignals from the FPGA are led and where a debug interface for the softcore processor is implemented, plus a SCSI 2 cable to connect themezzanine card and test board.

Complementing those hardware building blocks provided in each kitare the numerous readily available IP cores that can be used to assignthe specific functionality for each unique application.

They provide capabilities to implement a wide range offunctionality, such as a variety of controllers (CAN, Ethernet, binaryI/O, etc.), interfaces (Flash, PCI-to-Wishbone, Wishbone-to-ISA, etc.)counters, bridges and decoders.

These IP cores can be implemented individually or combined tosatisfy needs for computer I/O such as graphics, Ethernet or UARTs formobile or industrial communication, as well as for typical industrialfunctions such as digital/analog process I/O, motor control, SSI, etc.

The bottom line
As an open system adaptable standard approach to custom needs, theuniversal submodule concept can be implemented by any embedded systemsdeveloper using hardware provided by component suppliers adhering tothe universal submodule standards.

The publishedstandard, accessible to all vendors and users of PMC, M-Module andXMC mezzanine cards, documents the mechanical, electrical, andenvironmental characteristics of USM-compatible hardware components.That standard incorporates ample capacity and capability to satisfy awide range of needs. According to the universal submodule standard, thehardware components needed to provide the appropriate circuitry shouldbe qualified for the extended temperature range of -40 to +85 degreesCentigrade.

With that basic specification, plus the availability ofconduction-cooled mezzanine cards and the availability of sturdyconnectors and soldered components to handle added demands for shockand vibration resistance, the universal submodule concept can satisfyoperating requirements across a variety of rugged embedded systemapplications.

Robust performance, cost-effective versatility, easy fieldupgradeability, longevity in spite of component obsolescence and thefreedom-of-choice inherent in an open-system standard all qualify theuniversal submodule concept as a potential solution to many of thecommonly expressed I/O concerns of embedded systems developers.

Stephen Cunha is vice president ofMEN Micro'sU.S. subsidiary.

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