Hyperstone intros E2 RISC/DSP microcontroller - Embedded.com

Hyperstone intros E2 RISC/DSP microcontroller

LONDON — Hyperstone has introduced the E2, a 32-bit RISC/DSP microcontroller with a programmable serial communication engine, an analog to digital converter (ADC), and 32-kbytes I-RAM on-chip and complemented by an external memory and peripheral interface controller.

Based on the Hyperstone (Konstanz Germany) E1-32XSR – RISC/DSP core architecture, the E2 microcontroller uses a 32-bit unified RISC and DSP processor architecture, peak performance of 640MOPS and 160MHz and a dynamic frequency scaling, power down and sleep mode.

Typical power consumption of about 200-mW and the MCU uses an instruction set compatible to all Hyperstone E1 based controllers with parallel execution of ALU, DSP, and load/store instructions. It has a high code density using variable length 16, 32, and 48-Bit instructions and a programmable 8-channel serial communication engine.

It is possible to implement four UART ports possible and has a 10-bit, 8-channel multiplexed A/D-converter with sample rate of 182-kHz and a 2-channel DMA engine.

E2 is suitable for use in industrial sensing and control applications but also in cost sensitive applicationsincluding metering and scanning or in consumer applications.

A development kit is available including board and software development tools such as an integrated development Environment, C/C++ compiler, linker, assembler, source-level debugger with profiler, runtime kernel, and DSP library.

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www.hyperstone.com.

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