IEEE-1394 and AS5643 bring deterministic networking to high reliability Mil-Aero designs -

IEEE-1394 and AS5643 bring deterministic networking to high reliability Mil-Aero designs


For years, IEEE-1394 (FireWire) has been a successful and popular consumer electronics and computer interface. While that is true, the strongest design activity recently has been in other sectors. Over the past 17 years IEEE-1394 has been gaining traction as an aerospace and defense (A&D) high-speed interface and is used in programs such as the F-35 Lightning II, NPOESS, X47B, JSOW, and X2000, plus many others.

Much of IEEE-1394’s success came with the development of IEEE-1394b-2002, which specified several key features that when coupled with SAE Standard AS5643 created a deterministic, robust, and redundant system architecture that meets most A&D requirements for a hard real-time control bus. Technology suitability studies are common within the A&D industry for specific subsystems such as flight control, mission systems, and avionics to measure how technology meets stringent requirements; this document highlights several criteria often used to evaluate I/O technologies an how 1394 coupled with AS5643 meet them.

IEEE-1394 was first standardized in 1995. Major updates were completed in 2000 (IEEE-1394a-2000), 2002 (IEEE-1394b-2002), and in 2008 (IEEE-1394-2008). IEEE-1394-2008 Beta refined and extended IEEE-1394b-2002. It defines operation from S100 (98.304 Mb/s) to S3200 (3.932 Gb/s). Given this wide range of throughput options, 1394 is suitable for vehicle management and avionic and mission system networks including Electro-Optic/Infrared (EO/IR) sensor interfaces.

Deterministic behavior, excellent “robustness”
AS5643 coupled with IEEE-1394 Asynchronous Stream capability provides a programmable rate-based (time-sliced) protocol. The rate is determined by a control computer – also known as a Vehicle Management Computer (VMC) – generated Start of Frame (STOF) packet. Using pre-assigned offsets, each device can determine when to have data ready for transmission and also when to expect data from the bus. This allows for deterministic operation from the 1394 bus through each device and through the complete network.

Click on image to enlarge.

Figure 1: AS5643 Rate Based (TDMA-style) Deterministic Timing

In addition, AS5643 takes full advantage of IEEE-1394-2008 beta’s scrambled 8b10b encoding, which allows for transformer, capacitor, and optical isolation. Both transformer and fiber optic isolated systems have been tested to meet RTCA/DO-160 lightening susceptibility requirements.

Fault tolerance
AS5643 takes advantage of a 1394-2008 beta feature – looped topologies. 1394-2008 beta supports point-to-point, daisy chain, treed and multiple loop topologies. AS5643 recommends using loops to create a first level of topology fault tolerance, then defines a second level using double or even triple redundant networks. In addition to fault tolerance through the network architecture, 1394-defined header and data cyclic redundancy check (CRC) and AS5643-defined vertical parity check (VPC) provide bus level and application level error detection respectively.

Click on image to enlarge.

Figure 2: Triplex System Bus Architecture

Other Key Benefits
Initialization Time –IEEE-1394-2008 beta has a power-up initialization time of approximately500msec, while a long bus reset plus topology configuration takesapproximately 200usec for a nominally-sized bus. Both of these times areconsidered more than acceptable for most A&D applications. AS5643also applies an initialization saving technique of pre-assigning channeladdresses, thus creating a no node re-discovery requirement after busresets. This not only saves initialization time but also reducessoftware complexity and increases network robustness.

Risk (maturity)
– IEEE-1394 is a mature technology. Billions of commercial productswith FireWire have shipped over the past 17 years. Originally approvedby the SAE in 2004, AS5643 together with IEEE-1394 is flying in multipleaircraft, including the F35 Lightening II and X47B UCAS, plus others.

– Benefiting from years of development and commercial applications,most 1394 A&D applications today use COTS silicon . Forexample, the same 1394 Open Host Controller Interface (OHCI)implementations used in Macs or PCs are used for control computerimplementations. This has reduced direct product costs and also hasallowed A&D to take full advantage of the existing 1394 ecosystemsuch as chipsets, IP-cores, software stacks, test and measurementequipment, and manufacturing test systems.

Weight and Volume
– IEEE-1394-2008 beta requires two differential pairs per port, or oneTX/one RX per fiber optic port. 1394’s flexible cable topology support(homerun cabling is not required like star or switched architectures)allows the system implementer to optimize cable routing to meetweight/volume and robustness requirements.

Power Consumption – IEEE-1394-2008 beta requires two LVDS-type differential pairs perport. Using common 8b10b signaling, beta 1394 can be implemented withpower/performance optimized SERDES implementations. The digital logic inmost S400 PHY and Link implementations operates at less than 50MHz,which reduces switching currents.

Software Requirements –AS5643’s architecture applies several techniques to reduce softwarerequirements and increase robustness. Specifically, pre-assignedaddresses eliminate device discovery and allow for hardware addressfiltering. While frame rate and offset times may be programmable, mostsystem implementations fix these times, allowing for optimized deviceimplementations.

Scalability – A&D life cycles can often lastmultiple decades. IEEE-1394 is architected to scale in data rate withminimal software and cable harness changes. Implemented using commonSERDES technology IEEE-1394-2008 beta is FPGA-friendly, with multiple IPcores available. This has the effect of future- proofing 1394 when it’sused in long term A&D applications.

Cable Length –Often these applications feature considerable distances between nodes.According to Gore’s Quadrax cable selection guide for AS5643, 24 metersat S400 is possible with active transformers, and 50 meters is possibleat S100 with active transformers. Cable length may be extended even further usingrepeaters or fiber optics.

The sum is greater than the parts
Thislist of features undoubtedly indicates AS5643/1394’s suitability formany A&D deterministic applications. However, when looked at from asystem view AS5643/IEEE-1394-2008 Beta is an ideal solution forsafety-critical, deterministic (hard real-time) distributed control. Assuch, it provides the guaranteed latency and jitter needed to ensurethat the data required for distributed control functions is delivered ina timely and predictable manner.

The use of a predefined messageschedule with a distributed frame rate provides known and exactlypredictable communication bus loading and message sequencing.

AS5643’suse of looped topologies and redundant bus architecture means that thefailure of a single node, or even several nodes, does not preventsynchronized communication from continuing between the remaining nodes.Fault detection, containment, and tolerance are provided via the votingprotocol, message status, application level consistency checks, and dataintegrity checks implemented in the hardware.

AS5643/1394supports hot swap of nodes on the network. Faulty nodes can be replacedand new nodes integrated without powering down the rest of the system.This along with the strict interface specification supports modularityin system upgrades and new system integration. Modules can be upgradedand swapped with existing modules without disturbing the system andwithout full-system requalification. The strict interface definitionallows different manufacturers to create modules and essentiallyguarantees successful integration if the interface definitions areenforced.

The communication rates supported by AS5643/1394hardware currently available are suitable for the real-time controlrequirements of all safety critical vehicle subsystems. Higher datarates are only needed if noncritical data is transmitted along withcritical data. However, if higher speed transmission is required 1394’slayered architecture is obtained by moving to an appropriate physicallayer.

Finally, AS5643/1394 represents a cost-effective solution.Capitalizing on 1394’s commercial success, control computer and remotenode chipsets, IP Cores and supporting development software arecommercially available at a reasonable cost. The communicationcontroller can be implemented in a radiation-tolerant FPGA or in aradiation-hardened ASIC device for deployment if needed.

Implementationof the protocol in the hardware, such as transmit frame offset timingsupport, reduces the complexity and cost of software development. Unlikeswitched technologies, homerun cabling is not required to reachobscured devices, while support for both copper and fiber opticsprovides the option to network nodes at long distances. This reduceslong runs of bulky wiring bundles by placing the nodes close to thesystem components being monitored and controlled. 1394’s treed/looptopology support allows the wiring connections to multiple sensors andactuators to be shortened – only the lightweight twisted pair buses willbe routed over significant lengths.

Richard Mourn is a25-year veteran of the electronics industry and one of the originaldevelopers of the IEEE 1394 standard. He has been employed by TexasInstruments, Quantum Parametrics, and now DAP Technology, a globalcompany that designs, develops, and markets high quality IEEE 1394products and integrated solutions. He can be reached

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