Imagination launches RISC-V CPUs - Embedded.com

Imagination launches RISC-V CPUs

New RISC-V CPUs target heterogenous compute architectures, with its microcontrollers already shipping in automotive GPUs.

Imagination Technologies has launched a completely new family of RISC-V based CPUs designed for next generation heterogeneous compute needs, along with an SDK based on industry-standard build and debug tools, optimized C libraries, and an integrated development environment (IDE).

The company has named its new CPU product line Catapult, which comprises four distinct families: dynamic microcontrollers; real-time embedded CPUs; high-performance application CPUs; and functionally safe automotive CPUs. Imagination said the first family, microcontrollers, are already shipping in high-performance automotive GPUs in systems on chip (SoCs) from its customers. Real-time embedded CPUs are available now, while high-performance application CPUs and automotive CPUs will follow from 2022.

Based on the RISC-V open-source CPU architecture, Imagination’s Catapult CPUs can be configured for performance, efficiency, or balanced profiles, making them suitable for a wide range of markets. The CPUs are aimed at markets ranging across 5G modems, storage, ADAS / autonomous vehicles, data center, and high-performance computing. They are multi-threaded and come in both 32-bit and 64-bit variants and have customer configurable options, depending on the application need. They can be scaled up to eight asymmetric coherent cores-per cluster for enhanced SoC versatility, with an option to add custom accelerators.

Imagination CATAPULT CPU block diagram
Block diagram showing the new RISC-V based Catapult CPU architecture. (Source: Imagination Technologies)

Imagination said as the demand for compute grows in the cloud, at the edge and in devices, there is an ever-greater challenge to process immense amounts of data in tightly constrained area and power budgets. Heterogeneous architectures are key to providing performance, flexibility and resilience when accelerating an increasingly diverse set of workloads. Hence the new CPU cores enable it to better meet these needs by bringing to market a comprehensive range of RISC-V solutions that complement its GPU, neural network and Ethernet products.

One of the key arguments for deploying open-standard RISC-V architectures is the ability to avoid lock-in with proprietary architectures. Imagination said its entry into the market will enable the rapidly expanding RISC-V ecosystem to add a greater range of product offerings, especially for heterogeneous systems.

Being compliant with the RISC-V ISA, the Catapult CPUs are fully supported by the broad and increasing RISC-V ecosystem of software and tools. Part of Imagination’s heterogeneous compute solution, Catapult CPUs offer full hardware, software and debug support for SoCs using Imagination IP – complementing its GPU, AI and Ethernet packet processor (EPP) cores. With the early availability of performance models, SoC manufacturers can model their application needs and choose the right compute elements. This support allows producers to free up system resources and increase the performance and energy efficiency of their designs.

Catapult automotive CPUs are developed to ISO 26262 automotive standards and provide a range of CPU solutions for each automotive safety integrity Level (ASIL). In addition to being available in functionally safe and secure variants, the new CPUs are based on industry-proven security concepts. This design enables SoC manufacturers to attain the highest level of security and certification required by their target market.

Shreyas Derashri, vice president, compute, Imagination, said,“Imagination Catapult CPUs are an exciting new alternative for the RISC-V market. They contain all our experience and knowledge in creating innovative silicon IP and consolidate our position as the trusted heterogeneous IP solutions provider. Catapult offers comprehensive IP protection, thanks to a rich portfolio of CPU patents. The cores are scalable across markets, from embedded to high-end applications and are designed for robust performance while providing the same quality, reliability, and efficiency for which our products are renowned.”

Tatsuya Kamei, vice president, automotive SoC development division, Renesas, commented, “Renesas has a long history of working with Imagination, and its proven track record of delivering reliability, trust and innovation has enabled us to deliver market-leading automotive SoCs. The growing RISC-V market requires a wide range of products and trusted delivery partners, as well as an increased focus on safety and security. We welcome Imagination’s new Catapult RISC-V CPU IP, which is sure to meet those criteria.”

Imagination had made no secret that it was developing its own products based on RISC-V, as successive CEOs have told us. Mike Demler, senior analyst, The Linley Group, provided that affirmation, commenting, “As the RISC-V market continues to mature, we anticipated Imagination adopting the popular ISA for its renewed focus on CPUs. By applying its extensive experience with other CPU architectures, the new Catapult cores combined with the company’s GPUs and AI accelerators differentiate its offering from other RISC-V IP vendors. With a CPU line-up spanning microcontroller cores to apps processors, Imagination is the new contender to watch.”

Catapult SDK and Catapult Studio

Catapult CPUs are delivered with a fully-featured SDK, which includes enhanced versions of industry-standard build and debug tools such as GCC, LLVM and GDB, optimized C libraries, and Imagination’s IDE: Catapult Studio. Catapult Studio is based on Visual Studio Code, with extra features focusing on embedded, RISC-V development and close integration to the wider SDK, empowering developers to take full advantage of Catapult CPUs.

Catapult SDK is available for Windows, Ubuntu, CentOS and MacOS and includes both FreeRTOS and full support for Linux including reference bootloaders, kernels and Yocto-based filesystems.

Catapult CPUs are delivered with both fast and performance models, which offer interactive debug and are compatible with the gem5 simulator, unlocking simulation environments for enhanced power and energy-efficiency testing.


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