Imagination’s DOKs deliver substantial silicon PPA gains - Embedded.com

Imagination’s DOKs deliver substantial silicon PPA gains

Imagination Technologies is launching new Design Optimization Kits (DOKs) to provide customers with the flexibility to optimize for power, performance, and area (PPA) in its GPUs, CPUs, and other IP core families. Imagination DOKs are comprised of optimized reference design flows, tuned libraries from partners, characterization data and documentation.

The first Imagination DOK, which will be available later this year, enables customers using Imagination’s PowerVR Series6 ‘Rogue’ GPUs to significantly accelerate time-to-market and reduce power and area through a package of core IP and physical IP co-developed by Imagination and Synopsys.

Using the DOK, which includes Synopsys’ new DesignWare HPC (High Performance Core) Design Kit, customers leveraging PowerVR Series6 GPUs from Imagination can achieve up to a 25% reduction in dynamic power and up to 10% area savings, as well as up to 30% improvement in implementation turnaround time through a tuned design flow.

The collaboration between Synopsys and Imagination to develop DOKs utilizing Synopsys’ HPC Design Kit focuses initially on PowerVR GPUs and MIPS CPUs, with plans to extend across other key members of Imagination’s IP portfolio including VPUs (video and vision processors) and RPUs (radio communications processors).

The new Design Optimisation Kit for Imagination’s PowerVR Series6 IP cores, including an optimized reference flow, floorplan, and Synopsys’ DesignWare HPC Design Kit, will be available in Q3.

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