Implementation of a CW Filter in ham radio setups using a PSoC - Embedded.com

Implementation of a CW Filter in ham radio setups using a PSoC

Editor’s Note: In this Product How To article, Meng He of Cypress lays out the steps to implement a Continuous Wave (CW) filter in a typical ham radio setup by using a Cypress programmable SoC rather than placing a bandpass filter component in the RF tuning portion.

Amateur radio – or ‘ham’ radio – was the first technology-based social network, but it has more serious utility as well, and used to provide emergency communications during natural disasters, such as tornados and hurricanes, long before today’s Internet and satellite communications. Ham radio operators maintain finely-tuned antenna systems that allow them to send/receive good quality Morse code with ultra low power. Some hams even use old tube-based equipment and maintain them in good shape. In fact, amateur radio is the foundation of hundreds of advances in radio/communication theories.

Most amateur digital modes are transmitted by inserting audio into the microphone input of a radio and using an analog scheme. The Continuous Wave (CW) filter is a crucial part of this implementation, as it works on the audio from the radio set by narrowing the bandwidth. A good CW rig would do this with the received RF by placing a bandpass filter on the RF tuning portion. However, cheap receivers don't do this. This leaves engineers with two options: modifying the RF circuitry in the receiver or playing around with the audio.

In this article we describe an alternative design approach based on the Programmable System-on-Chip (PSoC) , which provides a simple mechanism to work with the audio.

The CW tone heard through the speaker is generally from 600 to 800 Hz, so the filters we used were bandpass filters that would allow only that tone to come through the speaker. By placing a selective audio filter in the path, you can keep a certain set of frequencies and suppress unwanted ones. A 600 Hz bandpass filter centered on 600 Hz passes tones from 300 to 900HZ while rejecting others. This is helpful when there is a lot of noise on the received frequency.

In this specific design, we implemented four bandpass filters with a central frequency of 250 Hz, 500 Hz, 750 Hz, and 1K Hz on a single chip that allows users to alter the filter channel in real time by using the dynamic re-configuration feature of PSoC (Figure 1 ). These four filters and two PGAs are all implemented with one CY8C27443 device using switched capacitor analog blocks.

Figure 1: CW filter design with four center frequency selections

As shown in Figure 2 , only four out of the 12 analog blocks are used in the design. Two blocks are dedicated PGAs for signal conditioning before and after the filtering, while the other two provide the hardware platform for the four bandpass filters.

Figure 2: Chip view of the design of four filters and two PGAs

There is a two-pole bandpass filter User Module in PSoC Designer that features:

  • User programmable center frequency, Q, and Gain
  • No external components required
  • Center frequency 20 Hz to 200 kHz
  • Automated design using wizard
  • User-selected over-sample ratio (OSR), a ratio of sample frequency to corner frequency
  • Built-in polarity control
  • Built-in comparator output for use in full-wave detection and communication applications
  • Built-in modulator for use in frequency translation and signal generation

ThePSoC User Module uses two switched-capacitor blocks to implement ageneral-purpose, second-order, bandpass filter. The switched capacitoranalog blocks are made up of a set of switched capacitors surrounding anop amp.

The switched capacitors allow configuration of theblock in many different modes, including as a comparator, amplifier,integrator, differentiator, ADC, and more. In the case of a filterdesign, the center frequency and Q are functions of the ratios ofprogrammable on-chip capacitors and clock frequency; no externalcomponents are required.

The user selects filter characteristicsand clock frequency. Capacitor and clock divider values areautomatically calculated in the design tool (wizard).[1]. Figure 3 shows the parameter set up for the filter with 1K Hz frequency.

Figure 3: Parameters for bandpass filter with 1K Hz central frequency

Inorder to switch between four filters in real time, we used dynamicre-configuration, which involves time-multiplexing the resources insidethe PSoC. Four loadable configurations were created in PSoC Designer.The original configuration is considered the “Base Configuration”, andthe other three are known as the “Overlays”.

Under each loadableconfiguration, users can use the tool’s Filter Wizard to set up thecenter frequency of each filter, and use the LoadConfig_[config_name]and UnloadConfig_[config_name] APIs to choose which filter to use. Wetime-multiplexed two analog blocks to implement four independentbandpass filters without consuming any other system resource.

Havinglimited MCU system resources is often a major design constraint.Dynamic reconfiguration, however, allows designers to reuse the analogand digital resources to achieve greater levels of functionality. Thisenables more complex designs to fit into a single chip to reduce cost.

Meng He graduated from Marquette University with Master of Science degree inElectrical Engineering and has been working at Cypress Semiconductor as aproduct manager since 2007. You can contact Meng at .

References:
1. User Module Datasheet: Two-Pole Band-Pass Filter Datasheet BPF2V 6.00 .

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