Due to the increasing overall complexity and integration, Electro-Magnetic Interference (EMI) issues on printed circuit boards (PCBs) are nowadays highly complex system level problems because of many aspects, such as: skew, rise-fall mismatch, delays, reflections, crosstalk, delta-I noise, unintentional and intentional antenna radiation, and other effects. Mobile devices such as smartphones, tablets, portable PCs and others have multiple-input-multiple-output (MIMO) on-board antennas.
It is the purpose of this paper to show an analysis of the main noise sources and how to reduce the noise by a significant amount thereby making the communication link more immune to interference problems making them less prone to two major challenges in co-design of the printed circuit board with the on-board antennas.
The first challenge is that these antennas have to be small, while still maintaining the required performance. Typical frequencies for which antennas have to be designed are 900 MHz and 1800 MHz (GSM), 1.57 GHz (GPS), 2.4 GHz (Bluetooth, WLAN), and 5 GHz (WLAN).
Due to their small physical size, the on-board antennas rely on the existence of a large ground plane on the PCB to aid in their performance. As will be shown in this paper, changing the ground-plane shape (width, height, slots, holes, stitching vias,… ) can have a big influence on both the resonance frequencies and the resonance depths. Similarly, changing the antenna location along the ground plane can have a significant impact as well. Antenna currents are induced in a large part of the PCB ground planes and can even reach regions that are physically far away from the antenna location.
The second challenge is that the PCBs contain a lot of high speed digital interfaces such as DDR2/3 or IO buses like USB3.0 or HDMI which can easily interfere with other parts on the PCB, certainly including the on-board antennas and their attached circuitry.
One of the first rules to avoid interference on PCB level is to partition the PCB in an intelligent way, such that critical noise sources (e.g. high-speed digital circuits, memories,… ) are placed far away from sensitive parts (e.g. analog receivers ).
The EMI reduction due to partitioning relies mainly on the physical phenomenon that above a few MHz return currents tend to stay very close to their signal current path in order to reduce the overall inductance of the total current path. So as long as this return current path is not disturbed (e.g. by use of full ground-planes ), all currents will be very “local” on the specified part of the PCB and will not interfere heavily with circuits at other places on the PCB.
When there are on-board antennas these will induce antenna currents in large parts of the ground planes on in PCB and even in regions that are far away from the physical location of the antenna. Hence, when partitioning the PCB, one has to know the distribution of these antenna currents in order to reduce the EMI to and from these antennas.
In this paper it will be shown that, indeed, the coupling through the interaction between the antenna currents induced in the ground planes and the return currents of digital traces is the major contributor for the EMI between digital and antenna currents.
As a consequence, simple passive measures that would think immediately tp reduce the EMI (e.g. on-board shielding ) don’t give much improvement. The most important aspect is to know how the antenna currents are distributed in the ground-plane, to put the digital in a region where these currents are small for the critical frequencies, and to make sure that there are no return path discontinuities of the digital current loops.
(**** Other authors of this paper are Hany Fahmy and Jan Van Hese, Agilent Technologies; Mehdi Mechaik, Nvidia Corp.; and Henry Zeng, Charlie Shu and Charles Jackson, Nvidia Corp. )
To read this external content in full, download the complete paper from the open online archives at the University of Leuven, Belgium.