Intersil launches single-chip multiple-channel video decoder - Embedded.com

Intersil launches single-chip multiple-channel video decoder

Intersil Corporation's TW9966 four-channel analog video decoder has a built-in analog video encoder for around-view automotive applications. The TW9966 features four analog video decoders and an analog video encoder integrated into a single chip, replacing up to five discrete components to simplify design and save board space. The new video decoder and encoder is optimized for automotive applications, offering excellent picture quality for generating 360-degree surround images for drivers.

The TW9966 is able to deliver best-in-class video quality from analog camera sources because of Intersil’s precision analog-to-digital converter (ADC) technology and proprietary comb filter integrated on chip.The TW9966 integrates four high quality NTSC/PAL analog video decoders with 10-bit ADCs to support: four analog camera inputs, a flexible digital output interface that sends the images to a processor that combines the four images into the unified around-view module, and one analog video encoder that outputs the combined video as an analog composite signal to the display, all in a single-chip solution. The TW9966 also incorporates analog anti-aliasing filters on each channel input to further reduce component count. The high level of integration helps to simplify the system design and minimize the solution footprint to preserve critical board space.

The TW9966 enables designers to program multiple system architecture options in terms of routing multiple channels of video to the back-end processor or FPGA, resulting in optimized board design and reduced cost. The TW9966 offers a digital output interface to support up to three different configurations: standard ITU-R BT.656 format output on four 8-bit buses at 27MHz; time multiplexed byte interleaved output to send two channels on a single 8-bit bus at 54MHz; or all four channels on a single 8-bit bus at 108MHz. The TW9966 also includes a phased-lock loop (PLL) to generate the 54MHz or 108MHz output, requiring only a lower cost 27MHz oscillator as a reference.

A flexible output interface supports standard ITU-R BT.656 format output on four 8-bit buses at 27MHz. It also supports time multiplexed byte interleaved output to send two channels on a single 8-bit bus at 54MHz, or four channels on a single 8-bit bus at 108MHz. Integrated PLL generates 54MHz or 108MHz output while using a lower cost 27MHz oscillator on the board.

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