Editor's note: Check out TechOnline's webinar Introduction to DisplayPort and Compliance Testing
The “war” between High-Definition Multimedia Interface (HDMI) and DisplayPort was short-lived. HDMI quickly and ubiquitously emerged as the champion of next-generation audio/video connection interfaces, becoming a standard feature of modern televisions, media players, gaming consoles, and cameras.
On a single cable, HDMI can support multichannel digital audio as well as any television or personal computer (PC) video format, whether it is standard, enhanced, or high definition. This flexibility spurred its swift global adoption, and HDMI looks poised to become an effective and widespread connection interface for years to come.
In light of these developments, why are more than 180 computer and consumer electronics companies actively supporting DisplayPort, another audio/video interface standard? This roster of companies, including industry titans such as HP, Dell, Intel and AMD, has grown by more than 20% annually for the past four years. And despite HDMI's wave of popularity, DisplayPort support and development continues to gain momentum.
Three possibilities exist for this set of circumstances: the “war” is not over; there was never a competitive struggle in the first place; or perhaps each standard just needed to find its own niche.
Different paradigms, different applications
What many are now realizing is while DisplayPort and HDMI provide advanced audio/video interfaces, they possess key differences that are pushing them in somewhat divergent directions.
With its ability to support a variety of video and audio formats, HDMI has been broadly adopted for high-definition TV (HDTV) applications. This adoption has spawned HDMI support in the countless devices that connect to HDTVs. HDMI is not a panacea for all audio/video connections, however. Its use in PC technologies–high-performance PC displays, in particular–has increasingly been scrutinized due to three unequivocal factors: cost, bandwidth, and internal connectivity.
The licensing and royalty fees associated with HDMI make it prohibitive for many low-cost, high-volume technologies, such as PC displays. HDMI's external clock limits its bandwidth and performance scalability. And its primary focus on consumer electronics box-to-box connectivity is devoid of internal, chip-to-chip connections that reduce design complexity and cost.
As displays increasingly transition to higher performance flat panel and microelectronic technologies, an affordable, extensible, open industry standard digital interface is needed that can scale in performance as well.
The DisplayPort specification defines a scalable digital display interface with optional audio- and content-protection capability for broad usage within business, enterprise, and consumer applications. The interface is designed to support both internal chip-to-chip and external box-to-box digital display connections.
As shown in Figure 1 the DisplayPort interface consists of a main link for transporting high-bandwidth data, an auxiliary channel for link and device management, and a hot plug detect line for interrupt requests initiated by the sink device. For more information about the DisplayPort interface see the sidebar.
Validation and compliance testing
With the performance, cost and design benefits of DisplayPort come many device specification conformance requirements. These requirements include explicit, multifaceted transmitter (source), receiver (sink), and cable tests.
Fortunately, DisplayPort shares many similarities with entrenched serial data technologies, such as PCI-Express, Serial ATA, and the like. DisplayPort test and compliance procedures will therefore be familiar to those in the computer electronics industry who have worked with popular serial data standards.
Nevertheless, each subsection within a DisplayPort interface has its own unique test challenges. And because DisplayPort features a dynamic operating model, hundreds of test conditions must be examined. Like many other standards, test requirements are published in a Compliance Test Standard (CTS).
|DisplayPort: The New Display Interface
The DisplayPort 1.1 specification put forth by Video Electronics Standards Association (VESA) defines a scalable digital display interface with optional audio and content protection. This new license-free, royalty-free, digital audio/video interconnect is intended to be used primarily between a computer and its display monitor, or a computer and a home-theater system.
The interface is designed to support both internal chip-to-chip and external box-to-box digital display connections. By consolidating the internal and external signaling methods, DisplayPort enables the introduction of “direct drive” digital monitors, resulting in a more efficient means of delivering flat panel display technology. DisplayPort is also suitable for connectivity between high-definition content applications such as optical disc players and HDTVs.
The video signal is not compatible with DVI (Digital Visual Interface) or HDMI, but a DisplayPort connector can pass these signals through. While DVI and HDMI require separate clock signals, DisplayPort embeds the clock in the data signal.
Functionally, DisplayPort provides a forward drive channel that is scalable from 1-4 lanes. It implements a micropacket architecture that can support variable color depths, refresh rates and display resolutions. A bi-directional return channel implements a micro-packet architecture for flexible delivery of control and status information. This micro-packet architecture enables future extensibility to additional content types and applications, and isn't limited to raster scan data.
In addition, DisplayPort includes a mechanical specification that defines a small, user-friendly external connector with an optional latch on the plug for robust connectivity with long cable lengths. The connector includes four forward lanes and is optimized for use on thin profile notebooks in addition to allowing up to four connectors on a graphics card.
Allion Test Labs, via its Taiwan facility, has been approved to offer compliance testing for the DisplayPort standard.
Leading test and measurement providers have responded in kind with tools and methodologies tuned specifically for DisplayPort. These include detailed step-by-step Methods of Implementation (MOIs) for DisplayPort source, cable, and sink validation under a variety of test conditions using specific test equipment.
There are 17 source tests for DisplayPort, 12 of which are required for compliance. These include amplitude, data rate, skew, spread spectrum clocking, and eye diagram tests, among others. The challenge for developers is the sheer number of unique operating conditions that must be investigated during DisplayPort source testing–28 in total.
DisplayPort has seven cable tests, five of which are required for compliance. These include skew, noise, impedance, insertion and return loss, and other measurements. Developers must work diligently to ensure measurement accuracy, especially when employing de-embedding techniques. And depending on the test equipment used, they must determine whether their instrumentation is affecting measurement results.
While there is only a single sink test for DisplayPort, focused on jitter tolerance, it's very involved. Developers must confirm, given the worst possible yet compliant signal, that their receiver will still recover data with an acceptable bit error ratio (BER).
They need to create seven types of jitter profiles–including random, sinusoidal, and inter-symbol interference (ISI) patterns–characterize the jitter and test the tolerance of the device under test (DUT) as shown in Table 1 . An example of a calibrated jitter pattern for the 2-MHz jitter profile is shown in Figure 2 .
First a PRBS7 pattern is used as the compliance pattern. Jitter is added in precise amounts and then the jitter is measured with advanced jitter analysis software tools.”) Other high performance display standards typically perform sink testing with jittered patterns like DisplayPort but require the user to visually verify whether the jittered test pattern displays pixel errors. DisplayPort, however, uses a built-in error detector facilitating a more automated test process.
All told, the DisplayPort tests themselves are not difficult or complex. They are, however, time consuming and therefore costly. Manually testing many test states across multiple data lanes is tedious at best. This approach also hinders repeatability, human error is commonplace and development costs can quickly escalate.
By working with select test and measurement vendors, developers can dramatically increase their productivity and reduce the time and cost of DisplayPort compliance testing. These vendors can offer detailed, step-by-step MOIs and DisplayPort-specific test software to eliminate manual measurements and automate the analysis of DisplayPort test data. Once the DUT has been configured, these software tools automate all DisplayPort test procedures, including data processing, measurement, and analysis.
In addition, all test data is automatically saved and archived when using these software tools. This means tests can easily be rerun, even without the presence of the DUT, thereby improving the repeatability of debug, troubleshooting, and compliance procedures. And reporting is improved through common detailed test reports that include graphics, screenshots, and pass/fail results.
While HDMI is well suited for its application to TVs, DisplayPort will continue to be an attractive option for those seeking to reduce the cost and improve the bandwidth and scalability of audio/video interface connections.
Members of the computer electronics industry, in particular, are increasingly adopting this open industry standard that consolidates internal and external display signaling and shares similarities with other widespread serial data technologies.
Randy White is the serial applications technical marketing manager at Tektronix. Randy has worked with various aspects of test and measurement solutions at Tektronix over the past few years. He has given seminars on high-speed serial measurements and is actively involved in many working groups for high-speed serial standards. He holds a BSEE from Oregon State University in Corvallis, Oregon.