Magnetoresistive RAM (MRAM)is anon-volatile memory technologythat retains memory content for at least 10 years without requiringpower. It is suitable for commercial applications that require savingdata during a system crash. MRAM-based devices can offer a solution for”black-box” applications, as it writes data at SRAM speeds while retaining databefore total power loss occurs.
MRAM is also suited for entertainment applications with resume-playfeatures. During power down, bookmarks that indicate the timestamp ofthe media played are quickly stored on the non-volatile MRAM. Then, asubsequ ent po wer up and resume play is performed almostinstantaneously (Figure 1, below ).
|Figure1: During power down, bookmarks are stored in MRAM to allow mediaresume-play application.|
Security systems can also benefit from MRAM by managing encryption.Encryption parameters can be stored quickly and retained during systemshutdown. This also goes for gaming machines that require fastdata-parameter storage and data integrity during a power loss.
MRAM versus other universal memoryoptions
Compared to other memory technology options, MRAM has distinctadvantages (Table 1, below ).
|Table1. MRAM offers comparative advantages over other memory technologies.|
The following list discusses the characteristics of other options:
Flash .Thistechnology uses a charge stored on a piece of floating polysilicon(floating gate) laid over a gate oxide. Programming a flash bit cellrequires a high voltage field that accelerates electrons fast enough toovercome the energy barrier of the oxide between the silicon and thefloating gate.
This causes the electrons to punch through the oxide and charge thefloating gate, which alters the threshold voltage of the bit-celltransistor. Repeated transfers of electrons through the oxide graduallywears out the oxide material, thus flash is limited to 10K-1M writecycles before the bit is no longer functional.
Continuous writes can wear out some flash memories in 10 days.Meanwhile, MRAM can endure infinite write cycles because no charging ordischarging is involved. Magnetic polarities are rotated duringprogramming, which is a non-destructive and nondegrading operation.
During programming, flash needs high voltage to draw electronsthrough the oxide material. MRAM uses current that creates a magneticfield to program the free layer. Furthermore, flash performs a programor erase operation on a large block of the memory array. MRAM performwrites on individual addresses.
SRAM. Usingactive transistors that hold CMOS logic level, SRAM requires power toretain memory contents. MRAM memory contents are held in the polarityof its free magnetic layer. Since it is magnetic, this layer retainsits state even without power.
As technology continues to shrink SRAM cells, the smaller geometrydevices tend to leak more. This leakage is small for individual cells,but becomes significant when multiplied by millions of cells in amemory device. This effect is expected to remain as technologiesshrink. Given MRAM's non-volatility, powerdown techniques can be usedin the system for zero current leakage.
Battery-backedSRAM. This consists of an SRAM unit and anaccompanying battery in the same package. This nonvolatile memory usesbattery power to retain memory contents. Meanwhile, MRAM does notrequire a battery for data retention and performs read/ write at aspeed faster than battery-backed SRAM. This improves reliability anddismisses environmental issues linked with battery disposal.
EEPROM. This standalone memory has much slower programming speeds compared withMRAM, and limited write-cycling capability.
NVSRAM. Also known as non-volatile SRAM, this combines SRAM andEEPROM features. It stores data from SRAM to EEPROM during power loss.However, the data transfer is very slow and requires a large externalcapacitor to hold power on the NVSRAM during data transfer. MRAM offersfaster writes so that data can be written during normal systemoperation.
Thus, minimum data transfer is necessary during power loss.Applications using MRAM also benefit by safely writing to the memorywithout using large external capacitors.
FRAM. Another non-volatile RAM, Ferroelectric RAM (FRAM) has typical smallarray sizes ranging from 4Kbit to 1Mbit. The array sizes are smallbecause this technology has limited scalability to further shrink thebit-cell size.
Without such scalability limitations, MRAM can offer larger memoryarrays. Moreover, MRAM can be programmed faster than FRAM. Some FRAMshave limited cycling capability (e.g. 10 billion cycles). They alsorequire a refresh of the memory after a read because the operationdestroys the contents of the bit cell being read.
DRAM. With this technology, memory has to be frequently refreshed to retaindata.
|Figure2. MR2A16A has an asynchronous design with standard chip-enable,write-enable and output-enable pins to provide flexible data buscontrol.|
After over eight years of MRAM R&D, the MR2A16A is the first 4MbitMRAMcommercial device. The device is arranged in a 256K x 16bitconfiguration (Figure 2, above )and has an asynchronous design with standard chip-, write- andoutput-enable pins.
Such a design allows system flexibility and prevents bus contention.Separate byte-enable pins also provide flexible data bus control inwhich data can be written and read as 8bits or 16bits.
It is fabricated using 0.18 micron process technology along with aproprietary MRAM process technology to create the bit cell. Five layersof interconnect are formed from both technologies.
The device runs on a 3.3V supply and has symmetrical high speedread/write access times of 35ns. It also offers fully staticoperations.
Packaged in 44-pin TSOP type- II, the device is configured withindustry-standard center power and ground SRAM pinout. It can be usedin existing hardware using the same SRAM configuration in itsapplication.
The device has toggle bit cells that contain one transistor and onemagnetic tunnel junction (MTJ). At the core of the MRAM bit cell, MTJis placed between two magnetic layers, each with associated polarities.The top layer is called the free layer because it has freedom to flippolarity, while the bottom layer is called fixed layer because it haslocked polarity.
|Figure3. Aligned polarity on MTJ results in low resistance.|
Polarity of the free layer through the MTJ determines if a bit isprogrammed as “0” or “1” state. Aligned polarity on both magneticlayers results in low resistance through the MTJ stack (Figure 3, above ).
On the other hand, opposed polarity on the two layers results inhigh resistance through the MTJ stack (Figure 4, below). This low andhigh resistance through the MTJ stack determines if a bit is read as”0″ or “1”.
|Figure4. Opposed polarity on MTJ results in high resistance.|
During programming, the free layer's polarity is toggled to one oftwo directions. Polarity is set with copper interconnects running inperpendicular directions on the top and bottom of the MTJ.
Current across the perpendicular interconnects creates a magneticfield that toggles the polarity of the free layer toward the oppositedirection ( Figure 5, below ).
One major drawback to producing MRAM as a reliable memory is itshigh bit-disturb rate. When programming the target bit, the free layerin an untargeted bit can be programmed inadvertently.
|Figure5. Current across perpendicular interconnects creates a magnetic fieldthat toggles polarity toward the opposite direction.|
In the MR2A16A, toggle bit cells were created to rotate the magneticmoment in the same direction each time the bit state is flipped. Astaggered pulse of current on write line 1 and write line 2 rotates thepolarity without disturbing bits along the same row or column as thetarget bit.
To further prevent untargeted bits from being disturbed, copperinterconnects were surrounded with a layer of cladding on three sidesof the copper. This cladding directs and focuses magnetic fieldstrength toward the target bit cell. This programs the target bitsusing lower current then isolates neighboring bits from the magneticfield that normally induces a disturb.
A bit endurance cycling study was done on MR2A16A to determine thedevice's endurance limit and negative effects on the soft error rate (SER) withrepeatedmemory use. The devices were run at 4MHz (250ns) and 90°C.
Cycling stress, functional testing and SER data gathering were rununder worst operating conditions for voltage and temperature. Units inthe study endured 58 trillion (5.8E13) cycles without failure – thus,the MR2A16A has infinite write-cycling capability. Meanwhile, studiesare being undertaken to gather all possible empirical data forwrite-cycling of the bit cell.
MRAM's next step covers automotive applications. For crash recorders,MRAM can gather and store more data during accidents and help determinecauses of vehicular accidents or malfunctions.
Automotive applications using sensors can benefit from MRAM. Sincesensors write data continuously, flash memories have difficulty keepingup with such data flow. New airbag systems also have sensors to detectand record passenger weight, interactions with other safety devices onthe vehicle and the impact of collision.
Other automotive systems such as odometers, tire pressure log andABS require frequent writes to memory that easily exceed thewrite-erase capabilities of flash and wear out its memory. MRAM'sunlimited write-cycling capability ensures a more reliable system formission-critical devices such as airbags and ABS.
The use of MRAM in the military is also gaining wide acceptance.Many systems use batterybacked SRAM and have inherent reliabilityissues with battery use. Honeywell has licensed Freescale's MRAMtechnology for its military and aerospace applications.
Further MRAM technology improvements can radically change embeddedsystems architecture. MRAM has the potential to replace RAM and flashmemory used in embedded MCUs for data storage and program memory,respectively. MRAM is expected to replace both and allow singlememoryarchitectures. MCUs have chip-specific ROM codes that MRAM can replaceto provide fast field-programmable upgrades.
With much larger systems, microprocessors use RAM memory for fastread/write capabilities. DRAM serves as a temporary storage area forchunks of the application program. A hard drive stores non-volatileinformation for application software and data, but it is slow to readand write. Once MRAM replaces all these storage devices, instantboot-up PCs will be possible.
Currently, no universal memory exists. All memories have tradeoffsin write-cycling endurance, read/write speeds, data retention, arraydensity, power use and price. Available memories on the market haveinherent limitations that prevent them from offering the best memoryfeatures. However, with further refinement, MRAM could someday behailed as the universal memory.
Tom Lee is Lead MRAM ProductEngineer in the Transportation and Standard Products Group at Freescale Semiconductor.