Latest Ikanos DSL chip set supports IPTV - Embedded.com

Latest Ikanos DSL chip set supports IPTV

COLORADO SPRINGS, Colo. — Ikanos Communications Inc.'s fifth generation of VDSL/ADSL chip sets offer optimized packet-control and networking services for the anticipated growth in IPTV services.

Many incumbent carriers describe IPTV as a primary motivation for moves to VDSL2 networks in the last mile to the home.

Ikanos is offering versions of its new chip set for both central-office access multiplexers and client customer-premises equipment. It is also offering two speed grades for each chip set.

Piyush Sevalia, director of product marketing at Ikanos, said its Fx100100-5 family makes use of the Fusiv network processor Ikanos acquired from Analog Devices Inc. earlier this year, though only in client designs offering integrated residential gateway services.

Standalone DSL modems will tend to use only a transceiver, though the Ikanos transceiver design integrates an Xtensa core from Tensilica. Devices aimed at customer premises carry the “S” suffix (for example, Fx100100S-5).

The Fx100100 platform supports speeds up to 100 Mbits/s, including the 30-MHz channel profile known as 30a. The Fx10050 equivalent supports speeds up to 50 Mbits/s. Both speed versions support all common 8-, 12- and 17-MHz profiles. Each port on the host DSP Burst Mode Engine can support VDSL2, VDSL, ADSL2+, ADSL2, or ADSL.

To support networks based on either Ethernet switches or external network processors, the family can interface to either RMII/SMII Ethernet interfaces or POS-PHY Layer 2 or 3 network processor interfaces.

A typical system design using the family includes the 8-port Burst Mode Engine, implemented in 90-nm CMOS; dual 4-port analog front ends, which perform rate conversion, implemented in 0.25-micron mixed-signal CMOS; dual 4-port integrated front ends for filtering and amp functions, also in 0.25-micron CMOS; and four dual-port line drivers with low-noise amps, implemented in 0.5-micron bipolar for high voltage drive.

Many quality-of-service functions in the new chip set are aimed specifically at IPTV applications. Packet classifiers support four queues per port, while a dynamic rate repartitioning engine allows reallocation of bandwidth across channels.

Sevalia said Ikanos will provide reference designs for both complex residential gateways and simple bridge modems in the home. The latter systems will use standalone BME processors, while multifunction set-top boxes and gateways will use the Fusiv network processor to control the BME and analog ICs in the Fx100100 chip sets.

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