MIPS 32-bit and 64-bit architecture – the most recent version, release 6 – became available Thursday (March 28) for anyone to download at MIPS Open web page.
Under the MIPS Open program, participants have full access to the MIPS R6 architecture free of charge – with no licensing or royalty fees.
“We are keeping our original promise on schedule,” Art Swift, president of its MIPS licensing business, told us. Late last year, Wave Computing, which owns MIPS, promised to make MIPS available for open use by the end of the first quarter of 2019.
Asked if any other MIPS cores – beyond R6 – will be available in the future, Swift said additional announcements are in the offing, indicating that Thursday’s offering is only the first set of MIPS Open’s release.
“Remember, this is a journey, not a destination,” Swift reminded.
Other pending announcements include MIPS Open’s certification partners and MIPS Open Advisory Board. Names of individuals or companies for those initiatives are not yet public.
So, what are the specifics for download at MIPS Open today? Included in this first release are:
The open source version of the 32 and 64-bit MIPS Instruction Set Architecture (ISA), Release 6
MIPS SIMD Extensions
MIPS DSP Extensions
microMIPS code compression
MIPS Open is also offering its first set of “deliverables.” “Deliverables” are “components” or “elements” of the MIPS Open Program that developers need to design their own MIPS cores using MIPS ISA. These components include MIPS Open Tools and MIPS Open FPGAs.
MIPS Open Tools cover integrated development environment for embedded real-time operating systems and Linux-based systems for embedded products. They will enable developers to build, debug and deploy applications on MIPS-based hardware and software platforms.
MIPS Open FPGAs, on the other hand, is a complete training program for community members. MIPSfpga, according to Swift, was originally developed as a classroom academic program. It comes with a comprehensive set of materials for a MIPS CPU, allowing students to see the actual RTL code and inner workings of the processor. MIPS Open FPGAs “should be helpful to developers who need to familiarize themselves with MIPS architecture,” Swift noted.
One more item available at MIPS Open is RTL code for the MIPS microAptiv core. Swift, however, made it clear that this is a sample code, available just for non-commercial use. The objective is to let developers explore microarchitecture features of MIPS, as microAptive is MIPS’ smallest, lowest-power CPU family.
The actual release of microAptive core, however, is several weeks away, according to Swift.