Leveraging multi-core processors with graphical system design tools - Embedded.com

Leveraging multi-core processors with graphical system design tools

A key step in tackling a multi-core design is developing a clearsoftware design methodology. The methodology must take advantage of theperformance and flexibility that multi-core processors offer, whilealso managing the complexity of programming for a multi-core processor.Two critical components of this methodology include:

1. Software tool flow – Used from concept to final design by starting with algorithmdevelopment, through software prototype and final deployment, softwaretool flow is a critical component due to the programming complexityinvolved in a multi-core design.

2. Real-Time Operating System (RTOS)- In addition to the thread handling and priority scheduling that anRTOS delivers on any platform, the RTOS also manages the hardwareabstraction layer. The RTOS handles components such as inter-processcommunication mechanisms, shared-memory data infrastructure, andsynchronization primitives.

Graphical system design offers many advantages for developing anembedded system for both single processor and multi-core designs.Projects can scale to multi-core while preserving the real-timebehavior and data integrity of the. This is an important benefit toengineers who know that their projects will increase in complexity andrequire more performance in the future.

Using graphical design tools
When dealing with embedded systems, it is no secret that the lines ofcode quickly increase as the overall complexity of the applicationescalates. Furthermore, programming overhead is not aided by adding themanagement of two processors instead of only one.

A method to abstract the complexity of programming embedded systems,both in single processor and multi-core designs, is to choose asoftware tool flow based on a graphical approach. The advantage of thismethodology is that many graphical-based tools, such as LabVIEW,include native functionality to handle complex programming and timing.

This means the embedded developer can focus on the critical piecesof code, for example, the intellectualproperty (IP) of the application itself to differentiate itfrom other embedded designs, rather than the low-level details.

As an example of how a graphical approach can abstract programmingcomplexity, see Figure 1, below .This application uses two loop structures which contain a filter taskand an Fast Fourier Transform (FFT)task running in parallel. Using LabVIEW loops in this mannerdivides an application into independent threads with user-definedpriorities and execution rates. In a multi-core design, these threadsare handed-off from LabVIEW to the OS which takes care of the loadbalancing between the two processors.

Figure1. Timed loops in LabVIEW execute tasks in parallel

Graphical system design is an approach that takes advantage ofgraphical programming in the context of embedded design. This approachconsists of three main stages: design,prototype, and deploy. The main concept is to leverage code re-usebetween stages, and in doing so, shorten the embedded design cycle.

The first stage is to design the primary IP of the application inthe form of algorithms and functionality used to describe the system.There are various high-level views to design the IP.

For example, an engineer could describe control tasks using amodel-based view, digital signal processing tasks using data flow, andmathematical formulas textually. LabVIEW accommodates these differentviews by including text-based math, continuous time simulation, statediagrams, and graphical dataflow models from within the samedevelopment environment.

Dr. Edward Lee, aleading researcher at the University of California at Berkeley forembedded software platforms, refers to these various design views as models of computation. Thesemodels of computation match the way system designers view their systemto help minimize the complexity of translating system requirements intoa software design. After the design is created, using whicheverapproach best solves the problem, the engineer can simulate the designin software before creating a hardware prototype.

The next stage in graphical system design is to prototype. In thiscase, the term prototype does not refer to an early iteration of thefinal custom embedded design. Rather, this stage refers to a functionalyet experimental prototype.

The process consists of taking the code created in the design stage,and verifying that design in a real-world environment using commercial-off-the-shelf(COTS) processors and I/O modules. There are many advantages toprototyping with COTS hardware early in the design process:

1. Instead of immediatelylaying out a custom printed circuit board and being forced to spendtime iterating on the hardware design as the software evolves, anengineer can fully validate their software design before passing off tothe hardware team. This allows an engineer to choose target hardwarelater in the design flow, based on cost and features, once the CPUrequirements are known.

2. An engineercan reprogram and reuse COTS prototyping hardware for future designs,not just the current design.

3. For low volumes, it maymake sense to actually deploy a system based on a rugged off-the-shelfprototype. Later, when economies of scale make it advantageous toproduce the embedded system in volume, the engineer can deploy thedesign to custom hardware.

After prototyping, the final stage is to deploy. The graphical codeused in the design and prototype stages are again reused, such that allthe IP from the original proof-of-concept is algorithmically preserved,with the exception of integrating the application with the customperipherals depending on the hardware layout.

Leveraging Multicore Performance
To add comprehensive support for multicore processors to an embeddeddesign programmed with LabVIEW, engineers can use an RTOS, in thiscase, the QNX Neutrino.

With a multi-core enabled RTOS, an engineer can achieve symmetricmultiprocessing, where the operating system can schedule activitieson multiple cores at the same time and provide true parallelprocessing.

A developer who designs an application ” called “virtualinstruments” (VIs) in LabVIEW – with multiple simultaneous executionpaths can instantly see increased computing power and shorter dataprocessing times, without the need for any special coding or designtechniques (see Figure 2 below ).

Figure2. Single core vs. Multi-core implementation

When using QNX Neutrino, there is no additional work required forLabVIEW to take advantage of a multi-core processor, as the RTOSautomatically manages this for the developer. Similarly, the process ofcode migration from a single processor to a multi-core design isgreatly simplified by not requiring any LabVIEW code change.

An added benefit when developing with the LabVIEW EmbeddedDevelopment Module for a Neutrino target system is that the systemdesigner is not required to choose the target CPU until late in theproject design.

The designer can complete the design and prototype stages withoutworrying about the target hardware. Then, after measuring the requiredCPU performance, the developer can choose a single core or multi-coretarget.

Notice that in Figure 2 above the LabVIEW VIs remain thesame in both cases. To help optimize performance, graphical tools areprovided by QNX to measure CPU load on single and multi-core targetsystems.

RandyMartin is Product Marketing Manager at QNXSoftware Systems.

To learn more about this topic go toMoreabout Multicores and Multithreading.”

References:
1. Trimborn, Mike.National Instruments. “GraphicalSystem Design Basics: Accelerating Development Time and BringingEmbedded Design to the Masses.” 

2. Multi-coreboard image courtesy of TechOnline: “IntelCore Duo processor and Mobile Intel 945GM Express Chipset VirtuaLab

3. Dr. Edward A.Lee, Advances in Computers (M. Zelkowitz, editor), Vol 56, AcademicPress, London, 2002

4. Craig andLeroux, QNX Software Systems: “LeveragingMulti-Core Processors for High-Performance Embedded Systems.”

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