The ARM architecture has become ubiquitous across a broad range of applications such as smartphones, embedded consumer devices, wireless sensors, and wearable Internet of Things devices, as well as for servers, traditionally a stronghold of the Intel x86 architecture.
Because so much is riding on the architecture's ability to meet the stringent power versus performance trade-offs of these diverse markets, it should come as no surprise that at the 2014 ARM Technical Conference in two weeks in Santa Clara, Ca., a lot of attention will be devoted to power management and energy-efficient ARM processor designs, including a track of 16 classes on the topic.
Because of the untethered mobile and wireless nature of many of the growing markets where the ARM is targeting being targeted, several of the classes at ARM Techcon will deal with the care and feeding of coin cell and other battery-based power sources, including “Marketing Malarkey and the Truth About Low Power Design,” taught by Embedded.com's Jack Ganssle, who will discuss what developers need to know about the ubiquitous coin cells. He says there is little accurate information available about how these batteries behave in systems that spend most of their time sleeping. So this class will give design guidance on the batteries, plus examine the many other places power leakages occur and offer some mitigation strategies.
In addition to this week’s “Coin cell voltage droop,” some recent blogs Jack has written on this topic include: “UL coin cell requirements , ” “How much energy can you really get from a coin cell ? ” and “Leaks and drains.” He has designed his own battery evaluation and testing setup at home, which he describes in “A sneak preview . “
A good companion class to attend is “Squeezing the Most Out of Battery Life Using ARM Cortex-M Processors,” in which Jacob Beningo will discuss strategies for optimizing MCU energy profiles for extended battery life while maintaining the integrity of the system. The techniques will be demonstrated on an ARM Cortex-M processor.
Some recent articles on Embedded.com about coin cell management that should be useful in giving developers some perspective on what will discussed by Ganssle and Beningo in their classes include:
Evaluating battery models in wireless sensor networks
Modeling of commercial, primary Li/MnO2 coin cells
Computing lifetimes for battery-powered wireless devices
Reducing battery discharge rates in CR-2032-based embedded designs
Complementing the two classes by Ganssle and Beningo is “ARM MCUs for Ultra-low Power Applications,” taught by Shay Gal-On and Markus Levy of EEMBC, also authors of “A new way to benchmark energy costs of embedded processor performance, ” In the class they will provide attendees with a hands on education on how to use EEMBC's EnergyMonitor and ULPBench tools to measure ARM microcontroller energy consumption during a variety of operating modes.
Providing some additional perspective on the issues that will be raised in these classes at ARM Techcon is this week's Tech Focus Newsletter , which contains a range of recent articles on power-efficient ARM MCU-based system design. Of these my Editor's Top Picks are:
System design trade-offs in a nextgen embedded wireless platform
An evaluation of the power and system design trade-offs in nextgen embedded wireless devices and how well Storm, based on an ARM Cortex-M4 with a 2.3µA idle current and a 1.5µs wake up time, measures up.
Energy efficiency on asymmetric multiprocessing systems
An analysis of how effective asymmetric multiprocessor designs (using ARM's big.LITTLE architecture based on the Cortex-A7 and -A15) are in balancing between high performance and energy efficiency.
ARM perspective on low-power, energy-efficient SoC designs
Lessons learned in addressing the transfer of low-power IP designs and implementation flows and methodologies into energy-efficient system-on-chip products for use by various ARM processor core licensees.
The authors of an all-encompassing analysis of the ARM architecture versus 8- and 16-bit MCUs titled “Low Power or High Performance: A Tradeoff Whose Time Has Come?” point out that while 32-bit processors such as the ARM dominate most embedded and mobile designs, they are pretty much excluded from applications with tight power requirements, which includes much of the wireless and M2M Internet of Things market.
At ARM Techcon, Jay Bolton (Sunrise Micro Devices) and David Flynn (ARM Holdings) in their class on “Efficient Sub-Volt IP Designs for IoT Applications,” will describe the work the two companies are putting into an a low-voltage, power-efficient Hard Macro IP solution specifically tailored to extreme low-power requirements of much of the IoT market.
The big question is: will this sub-threshold voltage enhancement to the underlying hardware architecture to run at lower voltages be enough? Or will it come at the cost of performance? Or will there always be segments of much of the mobile and embedded wireless IoT market in which 32-bit architectures such as ARM will play no role? I’d like to hear from you on this. What are your experiences with ARM and alternative 8- and 16-bit MCUs and how is this impact your decisions in future designs?
Embedded.com Site Editor Bernard Cole is also editor of the twice-a-week Embedded.com newsletters as well as a partner in the TechRite Associates editorial services consultancy. He welcomes your feedback. Send an email to , or call 928-525-9087.