The global storage market is witnessing a growing demand for NAND flash. This technology has been met through many developments, not only in the capabilities of today’s flash controllers but especially through the 3D NAND architecture. As the Industrial Internet of Things (IIoT), smart factories, autonomous vehicles, and other data-intensive applications continue to gain traction, the data storage requirements for these demanding applications have become more challenging.
In an interview, Lena Harman, marketing communications manager at Hyperstone, acknowledged that 3D NAND flash is taking a big step forward. The new memory technology has made tremendous progress in recent years and offers an interesting alternative to the established 2D NAND memory technologies used in SSDs.
“NAND flash storage is taking over data storage at a global level,” said Harman. “It’s dominating our future, driving new developments and has had strong growth over the last two decades. The constant demand for higher capacities has influenced NAND flash manufacturers to optimize their processes to enabling more bits to be stored per cell as well as shrinking feature sizes. While we now have 3D architecture which alleviate some of the challenges. NAND flash has ‘no brains‚ and has inherent imperfections, which is why it needs a flash memory controller to manage all the complexities that come with data transfers.”
The flash memory controller acts as the middle-man/data management system when it comes to communicating data from a host interface (connected to a system) to the NAND flash. Depending on the interface/ form factor there are different protocols the flash controller must consider in its design to be able to function properly, which is why we develop many different controllers for different interfaces (e.g. USB, SATA, CF PATA, SD).
3D technology: Floating gate vs. charge trap technology
2D NAND flash technology has fast access times, low latencies, low power consumption, robustness, and small form factors. Such major technological advances are aimed at reducing costs through structural miniaturization. However, the limit reached at 15nm has imposed new challenges in terms of errors during data readout and reduced robustness and data integrity. Therefore, innovations are moving in the direction of three-dimensional NAND flash (3D NAND) and increasing the number of bits per cell. In a 3D NAND flash memory, multiple layers of flash cells are stacked.
3D NAND Flash
3D NAND memory technology offers numerous advantages for both suppliers and customers. Higher memory density ensures that flash memory suppliers can produce devices with higher capacities and more gigabytes in a silicon wafer for the same yield. 3D NAND is a flash data storage technology that involves multi-layer silicon cutting, stacking memory cells to increase density and allowing cells to span on each layer by reducing interference from adjacent cells. The production process of 3D NAND is also less complicated than other alternative technologies, as it uses the same material but with small modifications to produce simple NANDs. To date, two approaches have become standard: floating gate and charge trapping.
With the floating gate method, charges are stored through an electrically isolated floating gate located between the channel and the control gate. In charge trapping architectures, charges are held within trapping centers, which consist of a layer of silicon nitride.
Regardless of whether the technology used is charge trap or floating gate, the data being sent from any given host system onto the NAND flash needs to be managed by a flash memory controller. This is why a highly reliable controller is an integral part of a performant system. 3D architecture pathed the way for high density flashes, but storage applications based on this technology now have an increasing demand for higher levels of reliability and data retention only achievable through a high-end controller. Ultimately, the choice of flash memory controller is key in achieving more endurance and longevity.
The current 3D architecture uses up to 176 layers. Although there do not appear to be any strict physical limit on the number of layers at present, going much further than this may require combining different development methods to stack 3D molds on top of each other. Developments in 3D architecture over the last decade have made high-capacity flash drives more attainable on a global scale. While this technology has brought many advantages on performance, longevity and its ability to make higher density cells (TLC, QLC) more reliable, it has also been coupled with complex and incredibly expensive manufacturing processes.
The controller provides the interface between the host and the NAND flash using standard interfaces but without the cost and space needed for physical connectors. The Hyperstone U9 family of flash memory controllers, together with the provided firmware, offers an easy-to-use turnkey solution for industrial, high endurance, and robust flash memory drives or modules compatible to host systems with USB 3.1 SuperSpeed 5 Gbps interface. Error correction functionality in Hyperstone memory controllers features a proprietary technology called FlashXE (eXtended Endurance).
FlashXE implements error correction based on Bose-Chaudhuri-Hocquenghem (BCH) codes, and the controllers also have an auxiliary error correction module that uses Generalized Concatenated Codes (GCC) providing state-of-the-art error correction comparable with LDPC (Low Density Parity Code). When the solid-state drive is implemented with discrete components directly on a host PCB, this approach is known as Disk on Board (DoB). A DoB approach is ideal for deeply embedded storage. It also has many advantages that make it attractive in other usage scenarios. The use of discrete components instead of a finished product reduces the total cost and gives the manufacturer total control over the Bill of Material (BoM).
>> This article was originally published on our sister site, EE Times Europe.
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