Redpine Signals, Inc., a provider of wireless semiconductor and systems solutions, recently unveiled the RS12000 SmartMCU family of MCUs, which the company boasts as the first series of MCUs specifically targeted to meet the stringent memory, security, and MIPS requirements of IoT devices and applications. Based on a multi-core IoT processor architecture, the RS12000 SmartMCU family provides industry-best performance and ultra-low power while maintaining high-level security and extending battery life as compared to standard Arm Cortex-M4 MCUs, according to the company. Applications include voice assistant-enabled, edge-intelligent IoT, and network/cloud-connected devices.
Leveraging Redpine’s gear-shifting processor architecture and ThreadArch four-threaded network security processor, the RS12000 SmartMCU family features an Arm Cortex M4F running up to 250 MHz, a sensor hub DSP coprocessor at 125 MHz, a four-threaded network security processor running up to 160 MHz, and a full suite of analog and digital peripherals, including VAD, CAN, Ethernet, eMMC/SD Card, ADC, op amps, DAC, and USB HS-OTG with PHY.
Configurations feature up to four cores and provide double the processing power, memory, and peripherals by including two gear-shifting Arm Cortex M4 processors and two ThreadArch network security processors, said Redpine. The integrated network security processor allows designers to run an embedded TCP/IP stack and access both the RAM and M4 processor cycles. A sensor hub coprocessor operating at 125 MHz accelerates machine learning and DSP processing functions in a local sensor data buffer, thereby lessening the load on the M4 processor.
Based on a trusted execution environment (TEE) architecture in conjunction with a separate network security processor, the RS12000 SmartMCU products include suite-B Crypto HW accelerators, secure boot, secure firmware upgrade, secure XIP, and secure peripherals, making them well-suited for IoT applications like smart home security systems, medical devices, and voice-based ordering.