MCUs slash response latency -

MCUs slash response latency


PIC18-Q43 microcontrollers from Microchip employ configurable peripherals smartly interconnected to allow near-zero latency sharing of data, logic inputs, or analog signals without additional code for improved system response in real-time control and connected applications. These core independent peripherals (CIPs) handle a variety of tasks, freeing the CPU for more complex system tasks or enabling it to go to sleep to save power.

The PIC18-Q43 family offers a 12-bit ADC with computation and up to 43 channels, an 8-bit buffered DAC, six DMA controllers, eight configurable logic cells (CLCs), three 16-bit dual PWMs, and a zero cross detect module that can monitor AC line voltage and indicate zero cross activity. Each CLC provides programmable logic for creating customized hardware-based logic functions and serves as glue logic for connecting on-chip peripherals.

In addition, the PIC18-Q43 series furnishes core-independent communication interfaces, including UART, SPI, and I2C, while multiple DMA channels and interrupt management accelerate real-time control with simplified software loops. Microchip’s development tool suite enables designers to quickly generate application code and customize combinations of CIPs in a GUI environment.

The PIC18-Q43 family comprises nine device variants with up to 128 kbytes of flash program memory, 1 kbyte of data EEPROM, and up to 8 kbytes of data SRAM in packages with 28, 40, 44, and 48 pins. All devices are available for volume production and sampling. Volume pricing starts at $0.64 each.

>> This article was originally published on our sister site, EDN.


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