Meeting the challenges of nextgen ARM SoC design

For embedded and mobile system developers, the ARM system development environment is a rich and fecund one, as is noted in this week's Tech Focus newsletter . But the problem for the many licensees of the ARM architectures and the developers who use cores based on them is keeping track of the new developments. This is particularly true in relation to multicore system on chips, their hardware/software co-development, and dealing with the system design issues involving verification to be sure the designs work as their creators intended.

Fortunately, one resource developers of ARM-based designs can depend on for up-to-date information is the company’s annual Technical Conference. At the 2014 ARM Techcon in two weeks in Santa Clara, Ca., for example, there will be at least three tracks of classes devoted to architectural design issues such as hardware/software verification, system design and chip implementation.

Of the 25 or so presentations in these three tracks, the ones at the top of my list of ‘must attend’ classes are:

Comprehensive HW-SW Debug for ARM Based Designs . Presented by Neeti Bhatnager, Larry Melling, and Frank Schirrmeister of Cadence Design Systems, this class will introduce, analyze and compare the advantages and disadvantages of different HW/SW Debug and System Debug options.

Performance Analysis and Verification of an ARM-based SoC Interconnect. Tushar Mattu of Synopsys will provide class attendees with details on how verification IP available to developers can be used to measure coverage and check compliance against ARM AMBA specifications such as AXI4 and CHI, showing examples of typical errors uncovered during verification. The session will also include unique protocol-aware debug methods to rapidly find root cause of issues.

Performance Optimization for an ARM Cortex-A53 System. In this class, Jason Andrews of Carbon Design Systems will show how virtual prototypes can be used to perform system optimization by running bare metal and operating system-level benchmarks on multicore ARM Cortex-A53 systems, along with realistic system traffic.

ARM Performance Tuning and Optimization. Perry Lea, Distinguished Technologist at Hewlett Packard, will provide insights into into various ARM optimization pitfalls, strategies to deal with them, and where changes in ARM CPU architecture require changes to software and dataflow for superior performance.

The Right Recipe for Mobile Computing's big.LITTLE. In this class, Chek San Leong, Manager, IP Ecosystem, TSMC, will provide details on the jointly-developed big.LITTLE technology test vehicle based on the ARM Cortex-A57 and Cortex-A53 processors, and how SoC designers can learn from these state-of-the-art techniques to create their own world-class implementations.

In addition to these conference classes, several Embedded.com articles are at the top of my Editor's Top Picks list because of their usefulness in ARM-based SoC design:

ARM perspective on low-power energy-efficient SoC designs
Lessons learned in addressing the transfer of low power IP designs and implementation flows and methodologies into energy-efficient System-on-Chip products for use by various ARM processor core licensees.

Benchmarking an ARM-based SoC using Dhrystone: A VFT perspective
The authors describe the development of a self-checking, result-signaling, tester pattern version of the popular Dhrystone benchmark.

ARM-based Android hardware-software design using virtual prototypes
A three part series on using the Synopsys Virtualizer Development Kit (VDK) to do early ARM hardware/software co-development of handset hardware running the Android software platform.

Using SystemC to build a system-on-chip platform
How Texas Instruments' designers used the SystemC hardware design language to do performance modeling when creating both the company's OMAP-2 platform and the devices based on it.

These topics are an area of active interest to embedded systems developers and I welcome contributions from you on your experiences and insights.

Embedded.com Site Editor Bernard Cole is also editor of the twice-a-week Embedded.com newsletters as well as a partner in the TechRite Associates editorial services consultancy. He welcomes your feedback. Send an email to , or call 928-525-9087.

See more articles and column like this one on Embedded.com.Sign up for s ubscriptions and newsletters . Copyright © 2014 UBM–All rights reserved.

Is a single-chip SOC processor right for your embedded project?When, where, and why embedded developers should consider a single- chip SoC processor as alternative to a general- purpose microcontroller.Embedded.com Site Editor Bernard Cole is also editor of the twice-a-week Embedded.com newsletters as well as a partner in the TechRite Associates editorial services consultancy. He welcomes your feedback. Send an email to , or call 928-525-9087.

See more articles and column like this one on Embedded.com.Sign up for s ubscriptions and newsletters . Copyright © 2014 UBM–All rights reserved.

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