Menta S.A.S., a supplier of embedded FPGA (eFPGA) solutions, used the 58th Design Automation Conference (DAC) in San Francisco to announce what it said is the industry’s first eFPGA soft IP offering, giving engineers greater flexibility in how they implement their SoC and ASIC designs.
Since 2013, Menta’s technology has been available as hard IP cores on any standard cell technology. Menta’s new soft IP eFPGA can be mapped by the end user to any foundry on any standard cell technology node, enabling customers to do the physical implementation in their own environment with their own EDA tool flow. As a result, Menta’s soft IP offers ASIC/SoC designers more flexibility, higher control of their IP implementation, and lower costs.
eFPGA IP is increasingly in demand because it allows hardware to be reconfigured after manufacturing, giving end products more upgradeability and longer life cycles. The eFPGA IP acts as “design insurance” for SoCs and ASICs that include algorithms which are evolving faster than the chip manufacturing cycle.
Since eFPGAs are programmed after the SoC is manufactured, they can offer one more layer of security by enabling the programming of the security protocols after the manufacturing process. Menta’s technology is being used to design highly secure, low-cost, low-power accelerators for AI, cryptography, and telecommunication algorithms, which can struggle on CPUs but can benefit from the eFPGAs’ parallel computing.
“Menta’s eFPGA soft IP enables customers to integrate eFPGAs in the same way as any other digital IP with lower cost and better control of their SoC/ASIC design,” said Vincent Markus, CEO of Menta. “We are also working with a number of design service providers, who can perform the physical implementation for their customers and apply their specialties and expertise to facilitate fast and reliable delivery of their customers’ SoCs.”
Menta said its eFPGA technology is the industry’s only 100% standard-cell based solution. This standard-cell based approach enables engineers to rapidly port the eFPGA to whatever new process geometry/variant they need – even in industrial and rad-hard grade versions. Menta’s soft IP is available immediately.
The Menta eFPGAs can be customized from a 100 cells up to 200k logic cells. It allows customers to specify the number of embedded logic blocks (eLBs), number and configuration of adaptive DSP, RAMs, number/type of interconnects, as well as different power-saving features. The goal is to enable its users to architect the exact FPGA needed. As an example, an adaptive DSP logic block can be incorporated within the eFPGAs. Designers can select the elements of the DSP such as using a pre-added or not. It’s possible to add the Menta patented FIR engine for signal processing, especially FIR/IIR filters. In addition, the adaptive DSP is entirely sizable to fit designers’ requirements whether they need 8bits precision for AI inference or 48bits precision for high quality audio. Designers can also embed their own proprietary arithmetic logic blocks (eCB).
Menta also offers Origami programming software enabling Menta’s eFPGA programming in an easy-to-use, intuitive FPGA programming tool environment. The software itself can be distributed to the SoC provider and their end customers.
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