Mentor adds emulation to Cortex-A9 MPCore verification -

Mentor adds emulation to Cortex-A9 MPCore verification

Mentor Graphics Corp .  has added hardware emulation for ARM Cortex-A9 MPCore processor-based System-on-Chip (SoC) design simulation on its Veloce emulator.

According to Eric Selosse, vice president and general manager, Mentor Emulation Division, the combination will allow SoC designers to test an embedded system containing ARM Cortex-A9 dual core processors, and accelerate their system-level verification to significantly increase their overall productivity.

The Mentor iSolve tool suite for ARM Cortex-A9 dual core designs, he said, combines the speed and accuracy of ARM-certified IP with the visibility and debug capabilities of the Veloce emulator, delivering solutions for verifying a variety of applications, such as smart-phones, tablets, and other high-performance consumer and enterprise products.

There is a plug-and-play interface to the Veloce emulator, which provides a cost-effective and efficient solution to verify dual core Cortex-A9 embedded systems.

The ARM Cortex-A9 MPCore processor addresses the needs of users who require processor products to have flexibility in performance, low power, and cost efficiency.

It uses an architecture that is ideally suited to addressing the peak performance demands of devices using multiple applications and complex operating systems, such as mobile computers and other portable devices, while at the same time offering reduced power consumption for higher levels of design flexibility. iSolve can be used with traditional in-circuit emulation (ICE) or high-performance transaction-based acceleration.

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