Microcontrollers have dramatically evolved over the past years, and edge computing is at the heart of this MCU evolution. That’s what Ron Martino, executive VP and general manager of edge processing at NXP Semiconductors calls a new era of edge computing. “As we approach the milestone of 75 billion connected devices, we need to address the real-time workloads for the next wave of innovation,” he added.
Martino’s statement came at the launch of NXP’s new portfolio of MCX microcontrollers which has incorporated a specialized neural processing unit (NPU) for accelerating inference at the edge. It allows much higher machine learning (ML) inference throughput without drawing down on processor resources. According to the company, that delivers up to 30x faster ML throughput than a CPU core alone.
Figure 1: The MCX portfolio of microcontrollers is targeted at smart homes, smart factories, smart cities, and other industrial and IoT edge applications. Source: NXP
The MCX portfolio comprises four series of microcontrollers and is based on Arm Cortex-M cores. It’s scalable to up to 4 MB flash and 1 MB SRAM and features low-power cache and memory management controllers to enhance the real-time performance of edge applications.
MCX N, the advanced version, features a broad range of peripherals, including NPU and DSP. Next, MCX N, the essential version, is optimized for cost-constrained applications; it comes with built-in timers, low pin count, and single-pin power supply. MCX W, catering to wireless connectivity, features Bluetooth LE radio, and its on-chip integration reduces external BOM. Finally, MCX L, optimized for ultra-low-power applications, boasts the lowest active power and leakage.
Figure 2: The MCX portfolio of MCUs is supported by the MCUXpresso suite of development tools and software to simplify product development. Source: NXP
For this MCU portfolio, hardware scales from 32 ops/cycle to more than 2k ops/cycle to ensure expansion with a single architecture. Likewise, software support is unified over the MCU portfolio to create consistent enablement. That allows developers to maximize software reuse across the portfolio to speed development.
>> This article was originally published on our sister site, EDN.
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