Micron launches automotive-qualified low power DDR5 memory - Embedded.com

Micron launches automotive-qualified low power DDR5 memory

Micron Technology has begun sampling what it said is the industry’s first automotive low power DDR5 DRAM (LPDDR5) memory that is hardware-evaluated to meet the most stringent Automotive Safety Integrity Level (ASIL), ASIL D.

As electronic components in cars become integral for safety, automakers must meet strict functional safety standards that require mechanisms to mitigate risk in the event of malfunctions. System integrators are ultimately responsible for justifying that all electronic components and subsystems are suitable for safety-related system in advanced driver assistance system (ADAS) technologies including adaptive cruise control, automatic emergency braking systems, lane departure warning and blind spot detection systems.

Micron’s JEDEC-compliant LPDDR5 is the first product within the company’s automotive-compliant memory and storage portfolio to be deemed suitable for safety systems at any ASIL level, based on the International Organization for Standardization (ISO) 26262 standard. It is accompanied with product-safety documentation collateral, including a hardware evaluation report, as well as safety application notes and analysis reports.

Micron car diagram ASIL with legend
Various systems in the car and their ASIL ratings (Image: Micron)

Importance of LPDDR5 in automotive functional safety

With more and more adoption of ADAS and autonomous technologies, data capture and efficient processing are becoming key to automotive innovation. Gartner projects the automotive memory market will grow to $6.3 billion in 2024, more than doubling from $2.4 billion in 2020. With data-intensive automotive technologies on the rise, ADAS-enabled vehicles now run over 100 million lines of code and require hundreds of tera operations per second, rivaling data center compute.

LPDDR5 addresses these requirements with a 50% increase in data access speeds and more than 20% improvement in power efficiency. These capabilities equip intelligent vehicles with near-instantaneous decision-making from the fusion of multiple sensors and inputs, such as radar, lidar, hi-resolution imaging, 5G networking and optical image recognition.

The energy efficiency of LPDDR5 enables high-performance compute for cars while minimizing power consumption for both electric and conventional vehicles, resulting in greener transportation with lower emissions. Micron’s automotive LPDDR5 is also ruggedized to support extreme temperature ranges and qualified for automotive reliability standards such as Automotive Electronics Council-Q100 and International Automotive Task Force 16949.

Micron LPDDR5
Micron’s low power DDR5 DRAM memory (Image: Micron)

Accompanied by extensive functional safety collateral, Micron’s LPDDR5 supports customers in conducting comprehensive safety analysis during system configuration. The Micron-provided hardware evaluation report verifies extensive functional safety analysis in strictest compliance with ISO 26262. To meet top-level safety requirements, LPDDR5 incorporates safety mechanisms to detect and control memory errors during operation, as well as mechanisms that can be implemented by system integrators to further reduce risk.

“Autonomous vehicles promise to make our roads safer, but they need powerful, trusted memory that can enable real-time decision-making in extreme environments,” said Kris Baxter, corporate vice president and general manager of Micron’s embedded business unit. “To fulfill this growing market need, we’ve optimized our automotive LPDDR5 to deliver the utmost performance, quality and reliability for the smart, safe cars of tomorrow.”

Recognizing the growing importance of functional safety, Micron has established an office dedicated to collaborating with customers on the memory requirements of designing safe automotive systems. To help customers navigate complex compliance obligations, this office was responsible for the launch of LPDDR5 with a safety application note and a supplier-provided hardware evaluation report of DRAM. Micron’s hardware evaluation has also been independently assessed and verified by exida, a renowned expert in automotive safety.

“Functional safety is essential to the development of advanced automotive systems, but to date, memory has had a somewhat neglected commercial off-the-shelf existence,” said Alexander Griessing, chief operating officer and principal safety expert at exida. “Micron has launched its industry-leading automotive LPDDR5 with a laser focus on ISO 26262, setting a new standard for the rest of the memory industry. This increased attention to functional safety will benefit all, from automakers to consumers who need advanced, safe vehicles.”

Functional safety basis and ISO 26262

While functional safety requirements have historically been addressed by the automotive Tier 1s and OEMs (original equipment manufacturers), the increasing system-level complexity and electronics associated with today and tomorrow’s vehicle puts more of a responsibility on the semiconductor suppliers themselves. These semiconductor suppliers, including memory suppliers, are offering enhanced support to help automotive Tier 1s and OEMs in their functional safety efforts.

ISO 26262 defines functional safety as the “absence of unreasonable risk due to hazards caused by malfunctioning behavior of electrical/electronic systems.”

Writing in a blog, Micron’s senior director or automotive systems architecture, Robert Bielby, outlined the classifications of failure types under ISO26262. There are two categories of failure types:

  • Systematic failures: these are failures that occur in a deterministic manner — typically introduced during product design or development. These failures are generally addressed by adopting well-documented processes and methodologies, including safety planning, safety concept documentation, requirements traceability, proactive safety analysis tools, robust verification, operational procedures and other associated factors.
  • Random failures: these are failures that appear arbitrarily during the lifetime of a device. Random failures can be further classified in two categories: transient faults (single-event upsets or soft errors) or permanent faults (hard errors such as stuck at a logic level). These types of failures are generally addressed by introducing safety mechanisms that help identify these faults, enabling the system to take the proper actions, including correcting the fault or enabling the system to maintain a safe state.

In order to address this, several safety mechanisms are employed at the hardware and system levels:

  • Redundancy: typically implemented at the hardware level.
  • Cyclic redundancy check: typically used for error detection.
  • Error correction code: generally used for both error detection and correction.
  • Built-in-self-test: provides additional circuitry that verifies accurate device operation, either continuously or during power-up.

The effectiveness of the safety mechanisms used to detect random failures in time (FIT) and the likelihood of risk are measured by the various metrics, including single-point fault metric (SPFM) and latent fault metric (LFM). These metrics are used to measure the functional safety of a given hardware component.

What are ASILs and ASIL levels?

ASIL refers to the Automotive Safety Integrity Level, a risk-classification system defined by the ISO 26262 standard for the functional safety of road vehicles. ASIL A systems have the least stringent level of safety reduction, whereas ASIL D is the most stringent. Because higher ASIL levels typically imply increased levels of cost and complexity, the required ASIL level for a given system scales in direct correlation to the impact of a that system’s failure on the operation of the vehicle. For hardware components, the ASIL requirements identify the requisite values for the failure metrics as shown in the table below.

ASIL levels targets Micron
Failure targets of the different ASIL levels (Image: Micron)

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