Microsemi's SmartFusion2 Advanced Development Kit is largest density 150K LE Device - Embedded.com

Microsemi’s SmartFusion2 Advanced Development Kit is largest density 150K LE Device

Microsemi Corporation has announced the company's new largest density, lowest power SmartFusion2 150K LE System-on-Chip (SoC) FPGA Advanced Development Kit. Board-level designers and system architects can quickly develop system-level designs by using the two FPGA Mezzanine Card (FMC) expansion headers to connect a wide range of new functions with off-the-shelf daughter cards, which significantly reduces design time and cost when creating new applications for communications, industrial, defense and aerospace markets.

The new SmartFusion2 SoC FPGA Advanced Development Kit offers a full featured 150K LE device SmartFusion2 SoC FPGA. This low power 150K LE device integrates reliable flash-based FPGA fabric, a 166 MHz Cortex(tm) M3 processor, digital signal processing (DSP) blocks, static random-access memory (SRAM), embedded nonvolatile memory (eNVM) and industry-required high-performance communication interfaces–all on a single chip.

Also included with the kit is a one-year platinum license for Microsemi's advanced Libero SoC design software, valued at $2,500 . With the Libero SoC design software Microsemi has created enhanced ease-of-use and design efficiencies with leading edge design wizards, editors and scripting engines for SmartFusion2 and IGLOO2 FPGA-based designs.

The SmartFusion2 SoC FPGA Advanced Development Kit board has numerous standard and advanced peripherals such as: PCIex4 edge connector, two FMC connectors for developing solutions offered with off-the-shelf daughter cards, USB, Philips inter-integrated circuit (I2C), two gigabit Ethernet ports, serial peripheral interface (SPI) and UART. A high precision operational amplifier circuitry on the board helps to measure core power consumption by the device.

The SmartFusion2 SoC FPGA memory management system is supported by 1GB of onboard double data rate3 (DDR3) memory and 2GB SPI flash–1GB connected to the Microcontroller Subsystem (MSS) and 1GB connected to the FPGA fabric. The serializer and deserializer (SERDES) blocks can be accessed through the peripheral component interconnect express (PCIe) edge connector or high speed sub-miniature push-on (SMA) connectors or through on-board FMC connector.

Key features

  • Largest 150K LE development device
  • 2x FMC connectors (HPC and LPC)
  • Purchase of kits comes with a free one-year Libero SoC design software platinum license (valued at $2,500)
  • DDR3, SPI FLASH
  • 2x Gigabit Ethernet connectors
  • SMA connectors
  • PCIe x4 edge connector
  • Power measurement test points

More information

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