MIPI nears ratification on SenseWire/I3C enhancement of I2C/SPI - Embedded.com

MIPI nears ratification on SenseWire/I3C enhancement of I2C/SPI

The MIPI Alliance  is in the final stages of ratification of its new MIPI I3C sensor interface specification for use in designing mobile and mobile-influenced and embedded applications.

An enhancement and exttension of the existing Inter-Integrated Circuit (I2C) and Serial Peripheral Interface (SPI) bus alternatives, the new specification will carry the name of MIPI “SenseWire” in mobile devices and “I3C” when used for connecting to a set of sensors, directly or indirectly.

According to Joel Huloux, chairman of the board of MIPI Alliance, the proliferation of sensors has created significant design challenges to product designers.

“The challenges are particularly demanding in the handset market, where smartphones often require as many as 10 sensors and more than 20 signals,” he said. “Yet as these requirements continue to grow, phone architectures can’t scale to deliver the design, cost and performance efficiencies manufacturers need to add more sensors to their products.

“Further, integration requirements can vary for each sensor, and the digital interfaces available to the market, including Inter-IC (I2C) and the Serial Peripheral Interface (SPI), are numerous.”

The result: interface fragmentation increases product development and integration costs. Also, currently available interfaces do not use power efficiently for communication with sensors, and this can limit their potential uses and scalability.

He said SenseWire incorporates and unifies key attributes of I2C and SPI while improving the capabilities and performance of each approach with a comprehensive, scalable interface and architecture.

The technical features of the MIPI I3C specification include a two-pin interface that is backward compatible with the I2C standard and provides data throughput capabilities comparable to SPI. The technical attributes explain the name for the specification, MIPI I3C, which is derived from its compatibility with I2C.

I3C Sensorwire, said Huloux, is designed to make it easier to do in-band interrupts within the 2-wire interface allowing drastic reductions in device pin count and signal paths which makes it possible to incorporate more sensors in a device.

On standard CMOS I/O, it supports a minimum data rate of 10 Mbps with options for higher performance high-data-rate (HDR) modes, offering a substantial leap in performance and power efficiency compared to existing options. It also offers multimaster support, dynamic addressing, command-code compatibility and a uniform approach for advanced power management features, such as sleep mode.

Huloux said an effort was made in the specification to anticipate sensor interface architectures that mobile, mobile-influenced, and embedded systems industries will need in the future.

“The specification should make it easier for system designers to connect and manage sensors in a device,” he said, “and improve time to market for these implementations as well as enable a greater number of sensors to operate in a device while minimizing power consumption and reducing component and implementation costs. “

It will also help manufacturers combine multiple sensors from different vendors to enable new features while supporting longer battery life.

“We set out to develop an interface that is evolutionary, not revolutionary, and that advances I2C and SPI,” Ken Foust, chair of the MIPI Alliance Sensor Working Group. ” This new specification will become a superset of both. “

He said MIPI Alliance collaborated with MEMS Industry Group (MIG) to survey both groups’ members to assess sensor interface needs and identify technology gaps that existing sensor standards can’t provide.

The survey findings helped guide the work of the MIPI Alliance Sensor Working Group, which has led development of the new specification. Companies participating in the MIPI Alliance Sensor Working Group included AMD, Audience, Broadcom, Cadence, Intel Corporation, InvenSense, Lattice Semiconductor, MediaTek, Mentor Graphics, NVIDIA, NXP, STMicroelectronics, Synopsys, Qualcomm Incorporated, QuickLogic, VLSI Plus, Ltd., ZMDI, and others.

The MIPI I3C specification is scheduled for Working Group completion by year-end 2014, with ratification and approval by the MIPI Alliance Board of Directors and publication in the first quarter of 2015.

For more information about the specification and the MIPI Alliance Sensor Working Group, go to mipi.org/working-groups/sensor.

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