A leading cellular communications chipset provider will be first to gointo production with an SoC that integrates MIPS Technologies'silicon-proven 1.8v 45nm PHY. The cores are designed to allowdevelopers to quickly integrate USB functionality intoadvanced SoCs fora wide number of vast number of consumer applications. “
According to Celio Albuquerque, director of physical connectivitysolutions, Analog Business Group, MIPS Technologies, the new USB PHY IPcores represent a new generation of USB physical layer architecturesusing 1.8v or alternatively 2.5v IO devices to deliver what he claimsis the industry's lowest power consumption for 45nm and 40nm SoCdesigns.
“Low power, along with a compact, silicon-saving design, makes these IPcores especially well-suited for leading-edge mobile applications,” hesaid. “Advanced programmability allows developers to fine-tune theanalog parameters of their system for maximum performance results insilicon.”
To learn more, go to www.mips.com..