MIPS cores offer wireless options - Embedded.com

MIPS cores offer wireless options

Imagination Technologies launched versions of its MIPS cores powering Wi-Fi/Bluetooth links, competing with ARM and Ceva in intellectual property for consumer wireless chips. The IP blocks target Internet of Things designs where some competitors are still fielding low power mobile SoCs.

Semiconductor and IP companies have traditionally focused on performance, reach, and throughput in their wireless devices while shirking power and board space, Chakra Parvathaneni, vice president of Imagination's wireless group, told EE Times. “We’re trying to bring a 2x or so better power and much more battery efficiency for sleep power. This is a new way that we believe every other chip vendor or connectivity technology vendor will be going as IoT matures.”

The company’s three new IP cores, dubbed Ensigma Whisper radio processing units (RPUs), use a Series5 architecture to integrate Wi-Fi 802.11n (C5400), Bluetooth Smart (C5300), or a combination of the two standards (C5401). The RPUs consist of a cluster of programmable MIPS processors that Imagination officials hope will straddle the line between software-defined chips and heavy hardware acceleration.

Block diagram for C5401. Source: Imagination

Block diagram for C5401. Source: Imagination

Although Imagination did not provide specs on low power, Parvathaneni said Bluetooth Low Energy on a MCU such as the C5300 should operate at sub 8 mWatts during transmission. Imagination’s new Wi-Fi module tends to consume about 72 mW in active receive mode. The Bluetooth/Wi-Fi combo core “is closer to C5300 numbers,” he said.

Various CPU configurations allow for a more basic design for send-and-receive devices, while at least a three-processor cluster will is designed for higher-level processing. Source: Imagination

Various CPU configurations allow for a more basic design for send-and-receive devices, while at least a three-processor cluster will is designed for higher-level processing. Source: Imagination

“We shrunk [receive] time by a much larger number [than chip vendors Broadcom and Qualcomm] and brought down the power it takes to wake up and sleep and so on for faster synchronization…which kind of brings down the power as it ramps up,” Parvathaneni said.

The cores operate at 20 MHz or 40 MHz with a data path of 6 bits or 8 bits. Traditionally these cores run at 80 MHz and 10 bits. Imagination also hopes to improve battery life by a factor of three to four, but didn’t provide details on how.


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