More about multicores and multiprocessors - Embedded.com

More about multicores and multiprocessors

We've collected the most recent how-to and technical articles fromEmbedded.com on multithreading, multicores, multiprocessor-on-chip(MPoc), and multiprocessor system designs. We're constantly updatingour lists of articles and industry links:
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Keep checking back to see what's new and let us know if you have linksto add or content to contribute.For upcoming activities in the industry relating to multicore design,go to the MulticoreAssociation Web site.
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2008
NEW!!Software defined silicon: why can't hardware be more like software?
It can, even though next generation multicore designsmix programmable logic, CPU blocks and dedicated logic. It requires anew approach to architectural design – software defined siliocn.

NEW!!Analysis: XMOS multicore chip offers low cost programmable I/O
BDTI analyzes XMOS Semiconductor's  XS-1 family ofmulticore chips offering programmable  intterfaces.

NEW!!Debugging a shared memory problem in a multi-core design with virtualhardware
This article demonstrates how a virtual platform can be used todebug a shared memory problem in a multi-core design

NEW!!Embedded multicore reversing DSP-GPP convergence
As multicore chips make waves in the embedded industry, the convergenceof DSP and non-DSP processors has changed to a renewed divergence.

NEW!!High level parallel programming model simplifies multicore design
Use of a high level programming model greatly simplifies softwaredevelopment for multicore processors, including heterogeneous multicoreprocessors.

NEW!!Multicore analysis made easy with Nexus 5001 debug spec
If you are looking for a nextgen follow-on to the JTAG interface foryour multi-core design, take a look at the Nexus 5001 debug spec, whichsupports the use of high bandwidth interfaces to efficiently transportdata between silicon targets and debug tools

NEW!!Implementing multicore designs using Advanced MC
Tim Van De Walle takes you through the reasons you should implementyour next multiprocessor based system using AdvancedMC and AdvancedTCA.

NEW!!Useful design patterns for building embedded multicore systems
Anderson MacKay provides a brief tutorial on design patterns you mayfind useful as starting points for thinking about how to implement amulticore into your embedded system.

NEW!!There's nothing new about multicore mania
The recent introduction of multicore architectures has been causing asprising amount of up roar. But multiprocessing has been around fordecades.

NEW!!Multicore systems-on-a-chip can handle embedded designs
Tailoring greater numbers of dedicated processors to discrete tasks andtypes of tasks provides advantages over traditional homogeneousconcurency when ensuring the simultaneous, reliable performance of bothtrivial and system crtical tasks.


Multicore puts the screws to parallelprogramming models

Leaders in mainstream computing are intensifying efforts to find aparallel programming model to feed the multicore processors already onchip makes drawing boards.

Fastvirtual platforms can open up multicore software development
Virtual platforms aid the short-term market takeoff of multicorearchitectures as well as their long-term acceptance..

Multicore software development: Fact andFiction
David Kleidermacher sorts through the myths and realities of doingsoftware development for multicore designs and grades the variousstandards that are emerging to address the challenges embeddeddesigners face.

Ismulticore hype or reality?
Multicore processors are here to stay but memory is a bottleneck.

Achievinghigher performance in a multicore-based packet processing design.
Michael Coward guides you through the design trade-offs in selectingthe memory subsystem archtecture that gets the most performance out ofa multicore-based packet processing engine.

2007
 
Partitioningapplications across multiple cores
The multicoreprocessors used in today's networking equipment commonly targetenterprise-level access routers, raising questions about partitioningapplications in such ways as to most effectively take advantage ofmulti-core capabilities.

Makinglife easier for multicore SoC software developers
Putting multiple processors on a single chip or on a single board hasenabled embedded systems hardware developers to provide more featuresand higher processing speeds using less power. But for softwaredevelopers – and vendors – this trend presents a daunting set ofchallenges.

Makingthe right architectural and tool choices in your multicore design
An effective multicore design strategy requires the use of softwaretools that allow programmers to focus on the design elementsthemselves, not the precise details of exactly how they areimplemented.

*Commonmulticore parallel programming problems and their solutions
In a four part series, Shameem Akhter and Jason Robertssurvey common multi-core programming problems and provide some insightinto their solution.
Part1: Threads, data races, deadlocksand livelocks.
Part2:  Heavily contended locks
Part3:  Non-blocking algorithms, ping-ponging and memory reclamation
Part4:  Memory,cache issues and consistency

*
Multicoregives more bang for the buck
Each new process geometry and microarchitecture delivers successivelyless in terms of performance gains. It is simply no longer possible todeliver Moore's Law by going faster.

* Streaming videowith “time slice” multicore-friendly processing eliminates droppedframes
David Workman of Kulabyte describes how to improve streaming videobased on H.264, MPEG-4, MPEG-2, On2 and most other codecs byeliminating droped frames and improving  bandwidth efficiency.

* Revisiting heterogeneous versushomogeneous
Jeff Bier looks at the trade-offs in suing homogeneous versusheterogenous processing elements in multicore chips for DSPapplications.

* BDTI benchmarks the picoChipPC102

BDTI has just released the first independent benchmark resultscomparing picoChip's massively parallel PC102 chip to that of high endDSP processors and FPGAs.

*Multi-CoreProcessors: Driving the evolution of automotic electronics architectures
According to Infineon's Patrick Leteinturier, the use of multicorearchitectures will increase in automotive applications because of thegrowing need for increased performance with lower power consumption.

*Makingthe transition from sequential to implicit parallel programming
Despite Microsoft's view that a parallel programming model formultiprocessing is 5 to 10 years away, Rishiyur Nikhil and Arvindbelieve we can't wait and delve into the options available now. In thisseries of eight articles, they look at the alternatives: sequentialversus parallel programming, procedural versus declarative andfunctional, explicit versus implicit.
Part1: How sequential languages obscure parallelism
Part2: How to achieve parallel execution
Part3: Explicit parallel programming with threads and locks
Part4: Explicit parallelism: message-passing programming
Part5: Implicit parallel programming: Declarative languages

Part6: So, why aren’t we using functional languages yet?
Part7: pH: an implicitly parallel, declarative language
Part8:Turning parallel Haskell (pH) into a production language


* Embeddedsoftware stuck at C
Embedded software developersare slowly moving to multi-core architectures, but they lack the neededstandards and will makd the transition without much help from parallelprogramming languages, said a panel of experts at the Power.orgconference.

* Demystifyingmultithreading and multi-core
Is multithreading better than multi-core? Is multi-core better thanmultithreading?

*Massivelyparallel processsors for DSP, Part 2
In Part 2, BDTI looks at innovative new tools for massively parallelprocessors

* UsingOpenMP for programming parallel threads in multicore applications
In this four part series, Intel's Shameem Akhter and JasonRoberts present the case for the OpenMP API as a way to code for highlyparallel muticore and multithreaded designs.
Part1: The challenges of threading a loop
Part2: Managing shared and private data
Part3: Performance oriented Programming
Part4: The OpenMP library functions and how to use them

*Acceleratesystem performance with hybridmultiprocessing and FPGAs
Multiprocessing is becoming a key differentiator for FPGA-basedprocessor architectures.

* Multicoremicroprocessors and embedded multicore SoCs have different needs
Steve Leibson of Tensilica assesses the tradeoffs between multicoremicroprocessors and embedded multicore SoCs and makes the case fordedicated tailored processors rather than general purpose architecturesas the best alternative.

  *Defining standard Debug Interface requirements for OCP-compliantmulticore SoCs: Part 2
In the second in a two part series, the OCP Debugworking group describes the work being done to update the Open Corespect to reflect the needs of complex uniprocessor and multicore Socs.This week: how will the OCP multicore interface will be used.

 * Definingstandard Debug Interface requirements for OCP-compliant multicore SoCs:Part 1
In the first in a two part series, the OCP working groupdescribes work being done on the spec to reflect the needs of complexuniprocess and multicore SoCs.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 3.
In the final part in a three part series, Intel'sShameem and Jason Roberts discuss condition variables, messages and howflow control constructs and how they can be used in a parallelprogramming environment.

Howto build a consistent mental model for reasoning about concurrency
It is necessary to build a consistent mental model forconcurrency  before implementing it in your software design.

* PythonNetWork Spaces and Parallel Programs
Python and NetWorkSpaces make it easy to create and experimentwith parallel programs without requiring specialized tools or hardware.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 2. In the second in a three part series, Intel's ShamemAkhterandJason Roberts deal with parallel programming constructs usingsynchronization, critical sections and deadlock in implementingmultithreading on multicore designs.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 1
In the second in a three part series, Intel's Shamem Akhter andJason Roberts deal with parallel programming constructs usingsynchronization, critical sections and deadlock in implementingmultithreading on multicore designs.
*
Applyingthe fundamentals of  parallel  programming tomultiprocessor  designs, Part 1
In the first in a series, Shameem Akhter and Jason Roberts of Intelprovide details on how tobreak up task threads in a parallel programming environment so thatmultiple operations can proceed simultaneously.
*Applyingthe fundamentals of parallel programming to multiprocessor designs Part2
Shameem Akhter and Jason Roberts of Intelprovidedetails on how to break up task threads in a parallel programmingenvironment so that multiple operations can proceed simultaneously.
*OptimizingSoftware for Multicore Processors
Multicore processors present the challenge of deciding how tovalidate and optimize code for performance gains.
*Understandpacket-processing performance when employing multicore processors
Your cache configuration can have a bigger impact on overallmulticoresystem performance than you expect.
* Multi-threadeddebugging techniques
Several general principles can be applied to debuggingmulti-threadedsoftware applications.
*Getmulticore performance from one core.
An SoC with a multithreaded virtual multiprocessor might bejust whatyou're looking for.
* Goingmulticore presents challenges and opportunities
Performance and power efficiency are key advantages, butthey're alsochallenging as the number of cores increases.
*
Excerpts from Wayne Wolf's book High-PerformanceEmbedded Computing . This five-part series describes thedifferences between running software on embedded multiprocessors versusgeneral purpose systems and the precautions that must be taken.
Part1, The role of the operating system
Part2, Multiprocessor Scheduling
Part3, Event-driven multiprocessor scheduling analysis
Part4, What's different about multiprocessor software?
Part5,  Achieving multiprocessor quality of service?
*
Excerpts from the book Customizable EmbeddedProcessors .In this four-part series entitled “Using sub-RISC processors innext generation customizable multi-core designs,” the authors statethe case for sub-RISC processing elements as the natural multicore SoCbuilding block.
Part1, Concurrent architectures, concurrent applications.
Part2, Generating a multicore architecture from the instruction set.
Part3, Deploying applications with Cairn.
Part4, IPV4 Forwarding Design Example
* A three-part series “Techniques for debugging anasymmetric multicore application” from Intel's Julien Carreno.
Part1, A typical asymmetric multi-core application
Part2, Tools for debugging
Part3, typical multicore debugging problems
* A seven-part series entitled “The challenges ofnextgenmulticore networks-on-chip systems” based on Luca Benini andGiovanni De Micheli's book Networks On Chips .
Part1, Why on-chip networking?
Part2, SoC objectives and NoC needs
Part3, Basic NoC approaches
Part4, Programming issues and approaches
Part5, Task-level parallel programming on multicore Networks-On-Chip
Part6, Communications-exposed programming
Part7, Tools for nextgen multicore networks-on-chips.
* Programmingthe Cell Processor
Our authors present algorithms and strategies they've used tomakebreadth-first searching on graphs as fast as possible on the Cellmulticore processor.
* DemystifyingESL for embedded systems designs
While the definitions of ESL may vary, the end result should bethesame, namely letting developers of multiprocessor and multicore systemsanalyze their designs at a higher level of abstraction.
* Taking the first step towards MPSoC design with network-on-chipmethodologies
Marcello Coppola and Carlo Pistritto describe the details of STMicro'snetwork-on-chip interconnect topology and provide perspective on howNoCs will solve some of the troubling on-chip traffic jams.
* Designing low-power multiprocessor chips
Chip designers face the challenge of reducing the number ofgates in adesign and implementing efficient architectures to reduce die size andthe total power consumption of a system.
* Parallelprocessing for multi-core DSPs 
Modern video-processing systems running multiple applicationssuch asimage processing, compression and content analysis force systemsdesigners to use multiple DSP chips, FPGAs and a system controller, butchip-level software tools don't address the system integration issues.
* Designingcustom embedded multicore processors
There are “multi” paths a designer can take to get the neededperformance.
* FunctionalTLM simplifies heterogeneous multiprocessor softwaredevelopment
Virtual prototyping technology is emerging that allows thecreation ofa high-performance, functional software model of an embedded multicoresystem that fully mirrors the hardware functionality
* Tipsfor effective usage of the shared cache in multi-core architectures
Tian Tian of Intel provides some guidelines on what to do andwhat toavoid when implementing shared cache in your multi-core based design.
* UsingPCIe in a variety of multiprocessor system configurations
Spanning the range from a uni-processor I/O interconnect fordesktopsystems to a backplane fabric supporting multiple processors forcommunications, PCIe is the only serial interconnect needed for insidethe box designs.
* Thesoftware industry needs to adapt–and soon–to multicore chips
The big question is how — and how soon — the softwareindustry willstep up and produce applications that can take advantage of multiplecores.
* Multicorefaces a long road
This may go down as the year the electronics industry woke upto thefull breadth and significance of the trend to multicore processors.
* WhyMultiprocessor Systems Need CORBA
CORBA enables software components in a multiprocessor system toeasilycommunicate–regardless of what language they are written in, what OSthey run on, or where they are located. Even better, COBRA makes iteasy to move functionality between DSPs, GPPs, and FPGAs.

20062009
Optimizing Video Encoding using Threads and Parallelism: Part 1 – Threading a video codec
In this two part series on optimizing the design of an H.264 video encoder using threads and parallelism, the authors illustrate how multithreading based on the OpenMP programming model is a simple, yet effective way to exploit parallelism that only requires a few additional pragmas in the serial code. Up first: Threading a video codec.

Optimizing Video Encoding using Threads and Parallelism: Part 2 – Tradeoffs
In the second in a series on optimizing the design of an H.264 video encoder using threads and parallelism, the OpenMP programming model and a few additional pragmas in the serial code, the authors outline the tradeoffs between speed and compression

Coordinated debugging of distributed systems
IEEE 1588 can be used to distribute the debugging process over the network.

Using multicore processors in embedded systems
Physical constants such as the speed of light, the size of electrons, and the operating temperature limits of silicon mean that Moore's Law can no longer be relied on to provide extra performance ad infinitum. Do multicore processors provide a solution?

Using a scheduled cache model to reduce memory latencies in multicore DSP designs
Freescale engineers describe a new software mechanism – the scheduled cache model ” and the supporting hardware that reduce the need for DMA programming and synchronization to achieve high core utilization, relying on hardware mechanisms (some controlled by software) to increase cache efficiency.

Threading through the parallel code optimization maze: Part 1
In this three part series, Max Domeika, author of “Software Development for Embedded Multicore Systems,” outlines how to use multithreading to parallelize code for use in multicore apps. Part 1: A parallelization and threading Primer

Threading through the parallel code optimization maze: Part 2
The Threading Development Cycle.

Threading through the code parallelization maze: Part 3
Debugging and tuning multithreaded code

Multicores can transform IP-based wired/wireless networking: Part 1
Here's how to overcome typical design complexities in multicore networking.

Multicores can transform IP-based wired/wireless networking, Part 2
Additional info on how to overcome typical design complexities in multicore networking.

Is virtualization right for your application?
A brief “no-bull” tutorial on how virtualization actually works and where it is most useful.

Evaluating the performance of multi-core processors- Part 1
In a two part series, Max Domeika, author of “Software Development for Embedded Multi-core Systems” evaluates the various processor benchmark suite available, with examples of how to estimate application performance. Part 1: Choosing the right benchmark suite.

Evaluating the performance of multi-core processors – Part 2
Estimating system and application behavior.

Seamless integration of multicore embedded systems
Here's a seamless and continuous integration approach that allows you to gradually introduce performance improvements while preserving an established functional baseline in an embedded system with demanding characteristics requirements.

Multicore programming made easy?
IMEC's MPA tool transforms sequential C into parallel code.

Using open-source GNU, Eclipse & Linux to develop multicore Cell apps: Part 1
In a five part series this week, Matthew Scarpino, author of “Programming the Cell Processor,” describes how to use open source GCC tools, Linux and the Eclipse IDE to develop multicore apps. Up first: Introducing the Cell Processor.

Using open-source GNU, Eclipse & Linux to develop multicore Cell apps: Part 2
Building Applications for the Cell Processor.

Using open-source GNU, Eclipse & Linux to develop multicore Cell apps: Part 3
Debugging multicore Cell Applications.

Using open-source GNU, Eclipse & Linux to develop multicore Cell apps: Part 4
Compiling and Running Simulated Applications.

Using open-source GNU, Eclipse & Linux to develop multicore Cell apps: Part 5
The Cell SDK Integrated Development Environment.

The state of multicore software
The hardware's ready. Now the software has to catch up.

The keys to success in multicore application development
Configuration, virtualization, and visualization are the keys to successful embedded multicore system integration, says Robert Oshana, Freescale's director of engineering in the Development Technology Group.

Virtual multi-cores simplify real-time system design
Systems comprising many small cores are well suited to handling complex real-time tasks, offering a software development cycle in which real-time tasks are allocated to (virtual) cores, each guaranteed to adhere to real-time constraints.

Maximize multicore performance with content aware routing
When moving from a single processor single core to a multi-processor multi-core system, are you finding that I/O performance does not scale at 10Gb/s? This article tells you why, and how you can solve the problem with content aware routing.

The ITRS process roadmap and nextgen embedded multicore SoC design
The chairman of the networking System Drivers Working Group at ITRS outlines the impact of that group's process technology roadmap will have on the architecture and capabilities of next generation multicore SoC designs.

A SystemC-Based RTOS Model for Multiprocessor Systems-on-Chips: Part 1 – Basic Concepts and Terminology
In this three part series, the authors describe an approach to modeling embedded applications represented as multithreaded applications executed on a multiprocessor platform running a number of, and possibly different, RTOSes.

A SystemC-Based RTOS Model for Multiprocessor Systems-on-Chips: Part 2
Uniprocessor Systems.

A SystemC-Based RTOS Model for Multiprocessor Systems-on-Chips: Part 3
Multiprocessor Systems.

Are you leveraging multicore processors effectively?
Decrease cost, add new features, and preserve intellectual property.

The Nulticore effect
More evidence shows that multicore just doesn't scale.

Nulticore Continued
If SMP multicore isn't a solution, what is?

2008
What multicore and longitude have in common
We need to develop tools for those brave enough to develop multicore systems.

Got OCP? The Role of the OCP in Multicore Designs
A brief exposition on the role of the open core protocol (OCP) in system-on-chip designs and the impact of the newest Version 3.0 on the design of multiprocessor SoCs.

Multicore SoCs change interconnect requirements
The recent appearance of multicore system-on-chip (SoC) devices has rearranged the boundaries among silicon devices, boards and subsystems.

Multi-Core — A New Challenge for Debugging
Development of complex systems with powerful hardware on one side and ambitious applications on the other side, benefits from on system-spanning on-chip support for debugging.

Using micro-benchmarks to evaluate & compare Networks-on-chip MPSoC designs
The authors lay out a set micro-benchmarks to evaluate and compare multicore networks-on-chip (NoC) architectures designed to systematically exercise all of the important aspects of a NoC/MPSoc design.

BDTI benchmarks Tilera's multicore processor
BDTI finds that the TILE64 is a powerful chip, but that its cost-performance–while superior to that of a DSP–is not nearly as good as that of an FPGA.

Improve the efficiency of embedded multi-core hypervisor designs
A comparison of Green Hill's RTOS-specific Padded Cell “hybrid-visor” approach versus alternative more traditional virtual machine management “hypervisors” in embedded designs.

Embedded multicore: Gateway to greener networks
System manufacturers are taking a new look at ways to decrease the power consumption of their equipment and lower the overall power requirements of their end customers’ networks.

Analysis: PolyCore tools ease multicore development
PolyCore offers specialized development tools and run-time software to ease the communications aspect of multicore software development.

Achieving cache coherence in a MIPS32 multicore design
Here's an example of how the Open Core Protocol was used to reconfigure the basic MIPS32 architecture to support cache-coherent traffic within an embedded multicore cluster.

Virtualization for embedded X86 multiprocessor applications
The addition of Intel's VT hardware technology to its x86 CPUs makes possible the creation of a software-based embedded virtual machine manager.

Wanted: industry standards for benchmarking embedded VMM hypervisors
What the embedded systems industry needs is a standard way to compare hypervisors to see which one works best on a particular system. Here's an example of EEMBC's benchmarks.

Virtualizing Real-Time Operating Systems with Windows
Heinrich Munz describes how to use Kuka's “RTOS-VM,” to virtualize not only VxWorks or Windows CE, but any x86 OS as well.

Debugging multiprocessor code
Debugging code running on multiprocessor computing systems–and, in particular, parallel code on multicore devices–is an old problem that has achieved new prominence because of the profound transformation of hardware from single-processor to multiprocessor and multicore solutions.

Getting started with multicore programming: Part 1
Guidelines to finding the parallelism in your multicore design and developing a methodology that starts with sequential C-code and incrementally adds parallelism. Part 1: what makes parallelizing code so hard.

Getting started with multicore programming: Part 2
Multithreading in C

Interactive C-code cleaning tool supports multiprocessor SoC design
To simplify the development of code suitable for parallelization and mapping on multiprocessor platforms, researchers at IMEC have developed a set of CleanC guidelines and a code analysis and refactoring toolbox to make code compliant to the CleanC programming style.

Attack the parallel worlds of parallel programming
It's the tool industry's obligation to address the issues associated with parallel programming.

Debugging a Shared Memory Problem in a multi-core design with virtual hardware
This article demonstrates how a virtual platform can be used to debug a shared memory problem in a multi-core design.

Single-chip coherent multiprocessing is next step
Driving individual processor performance to the limit in a given implementation technology is never easy or efficient. Faster clocks, deeper pipelines and bigger caches carry silicon area and power dissipation costs that result in diminishing returns for that last 10 percent of performance.

Implementing dual OS signal processing using Linux and the DSP/BIOS RTOS
In mixed DSP/GPU environments, to leverage the strengths of both Linux and an RTOS, use a system virtual machine to allow programmers to both concurrently on the same DSP processor.

Analysis: IBM's Cell for Embedded?
BDTI recently investigated the current state of Cell products, and whether the architecture is likely to get significant traction in embedded applications.

>Software defined silicon: why can't hardware be more like software?
It can, even though next generation multicore designsmix programmable logic, CPU blocks and dedicated logic. It requires anew approach to architectural design – software defined siliocn.

Analysis: XMOS multicore chip offers low cost programmable I/O
BDTI analyzes XMOS Semiconductor's  XS-1 family ofmulticore chips offering programmable  intterfaces.

Debugging a shared memory problem in a multi-core design with virtualhardware
This article demonstrates how a virtual platform can be used todebug a shared memory problem in a multi-core design

Embedded multicore reversing DSP-GPP convergence
As multicore chips make waves in the embedded industry, the convergenceof DSP and non-DSP processors has changed to a renewed divergence.

High level parallel programming model simplifies multicore design
Use of a high level programming model greatly simplifies softwaredevelopment for multicore processors, including heterogeneous multicoreprocessors.

Multicore analysis made easy with Nexus 5001 debug spec
If you are looking for a nextgen follow-on to the JTAG interface foryour multi-core design, take a look at the Nexus 5001 debug spec, whichsupports the use of high bandwidth interfaces to efficiently transportdata between silicon targets and debug tools

Implementing multicore designs using Advanced MC
Tim Van De Walle takes you through the reasons you should implementyour next multiprocessor based system using AdvancedMC and AdvancedTCA.

Useful design patterns for building embedded multicore systems
Anderson MacKay provides a brief tutorial on design patterns you mayfind useful as starting points for thinking about how to implement amulticore into your embedded system.

There's nothing new about multicore mania
The recent introduction of multicore architectures has been causing asprising amount of up roar. But multiprocessing has been around fordecades.

Multicore systems-on-a-chip can handle embedded designs
Tailoring greater numbers of dedicated processors to discrete tasks andtypes of tasks provides advantages over traditional homogeneousconcurency when ensuring the simultaneous, reliable performance of bothtrivial and system crtical tasks.
Multicore puts the screws to parallelprogramming models
Leaders in mainstream computing are intensifying efforts to find aparallel programming model to feed the multicore processors already onchip makes drawing boards.

Fastvirtual platforms can open up multicore software development
Virtual platforms aid the short-term market takeoff of multicorearchitectures as well as their long-term acceptance..

Multicore software development: Fact and Fiction
David Kleidermacher sorts through the myths and realities of doingsoftware development for multicore designs and grades the variousstandards that are emerging to address the challenges embeddeddesigners face.

Ismulticore hype or reality?
Multicore processors are here to stay but memory is a bottleneck.

Achievinghigher performance in a multicore-based packet processing design.
Michael Coward guides you through the design trade-offs in selectingthe memory subsystem archtecture that gets the most performance out ofa multicore-based packet processing engine.

2007
Partitioningapplications across multiple cores
The multicoreprocessors used in today's networking equipment commonly targetenterprise-level access routers, raising questions about partitioningapplications in such ways as to most effectively take advantage ofmulti-core capabilities.

Makinglife easier for multicore SoC software developers
Putting multiple processors on a single chip or on a single board hasenabled embedded systems hardware developers to provide more featuresand higher processing speeds using less power. But for softwaredevelopers – and vendors – this trend presents a daunting set ofchallenges.

Makingthe right architectural and tool choices in your multicore design
An effective multicore design strategy requires the use of softwaretools that allow programmers to focus on the design elementsthemselves, not the precise details of exactly how they areimplemented.

Commonmulticore parallel programming problems and their solutions
In a four part series, Shameem Akhter and Jason Robertssurvey common multi-core programming problems and provide some insightinto their solution.
Part1: Threads, data races, deadlocksand livelocks.
Part2:  Heavily contended locks
Part3:  Non-blocking algorithms, ping-ponging and memory reclamation
Part4:  Memory,cache issues and consistency

*
Multicoregives more bang for the buck
Each new process geometry and microarchitecture delivers successivelyless in terms of performance gains. It is simply no longer possible todeliver Moore's Law by going faster.

* Streaming videowith “time slice” multicore-friendly processing eliminates droppedframes
David Workman of Kulabyte describes how to improve streaming videobased on H.264, MPEG-4, MPEG-2, On2 and most other codecs byeliminating droped frames and improving  bandwidth efficiency.

*Revisiting heterogeneous versushomogeneous
Jeff Bier looks at the trade-offs in suing homogeneous versusheterogenous processing elements in multicore chips for DSPapplications.
*BDTI benchmarks the picoChipPC102
BDTI has just released the first independent benchmark resultscomparing picoChip's massively parallel PC102 chip to that of high endDSP processors and FPGAs.

*Multi-CoreProcessors: Driving the evolution of automotic electronics architectures
According to Infineon's Patrick Leteinturier, the use of multicorearchitectures will increase in automotive applications because of thegrowing need for increased performance with lower power consumption.

*Makingthe transition from sequential to implicit parallel programming
Despite Microsoft's view that a parallel programming model formultiprocessing is 5 to 10 years away, Rishiyur Nikhil and Arvindbelieve we can't wait and delve into the options available now. In thisseries of eight articles, they look at the alternatives: sequentialversus parallel programming, procedural versus declarative andfunctional, explicit versus implicit.
Part1: How sequential languages obscure parallelism
Part2: How to achieve parallel execution
Part3: Explicit parallel programming with threads and locks
Part4: Explicit parallelism: message-passing programming
Part5: Implicit parallel programming: Declarative languages

Part6: So, why aren't we using functional languages yet?
Part7: pH: an implicitly parallel, declarative language
Part8:Turning parallel Haskell (pH) into a production language


* Embeddedsoftware stuck at C
Embedded software developersare slowly moving to multi-core architectures, but they lack the neededstandards and will makd the transition without much help from parallelprogramming languages, said a panel of experts at the Power.orgconference.

* Demystifyingmultithreading and multi-core
Is multithreading better than multi-core? Is multi-core better thanmultithreading?

*Massivelyparallel processsors for DSP, Part 2
In Part 2, BDTI looks at innovative new tools for massively parallelprocessors

* UsingOpenMP for programming parallel threads in multicore applications
In this four part series, Intel's Shameem Akhter and JasonRoberts present the case for the OpenMP API as a way to code for highlyparallel muticore and multithreaded designs.
Part1: The challenges of threading a loop
Part2: Managing shared and private data
Part3: Performance oriented Programming
Part4: The OpenMP library functions and how to use them

*Acceleratesystem performance with hybridmultiprocessing and FPGAs
Multiprocessing is becoming a key differentiator for FPGA-basedprocessor architectures.

* Multicoremicroprocessors and embedded multicore SoCs have different needs
Steve Leibson of Tensilica assesses the tradeoffs between multicoremicroprocessors and embedded multicore SoCs and makes the case fordedicated tailored processors rather than general purpose architecturesas the best alternative.

  *Defining standard Debug Interface requirements for OCP-compliantmulticore SoCs: Part 2
In the second in a two part series, the OCP Debugworking group describes the work being done to update the Open Corespect to reflect the needs of complex uniprocessor and multicore Socs.This week: how will the OCP multicore interface will be used.

 * Definingstandard Debug Interface requirements for OCP-compliant multicore SoCs:Part 1
In the first in a two part series, the OCP working groupdescribes work being done on the spec to reflect the needs of complexuniprocess and multicore SoCs.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 3.
In the final part in a three part series, Intel'sShameem and Jason Roberts discuss condition variables, messages and howflow control constructs and how they can be used in a parallelprogramming environment.

Howto build a consistent mental model for reasoning about concurrency
It is necessary to build a consistent mental model forconcurrency  before implementing it in your software design.

* PythonNetWork Spaces and Parallel Programs
Python and NetWorkSpaces make it easy to create and experimentwith parallel programs without requiring specialized tools or hardware.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 2. In the second in a three part series, Intel's ShamemAkhterandJason Roberts deal with parallel programming constructs usingsynchronization, critical sections and deadlock in implementingmultithreading on multicore designs.

* Threadingand parallel programmingconstructs used in multicore systems development: Part 1
In the second in a three part series, Intel's Shamem Akhter andJason Roberts deal with parallel programming constructs usingsynchronization, critical sections and deadlock in implementingmultithreading on multicore designs.
*
Applyingthe fundamentals of  parallel  programming tomultiprocessor  designs, Part 1
In the first in a series, Shameem Akhter and Jason Roberts of Intelprovide details on how tobreak up task threads in a parallel programming environment so thatmultiple operations can proceed simultaneously.
*Applyingthe fundamentals of parallel programming to multiprocessor designs Part2
Shameem Akhter and Jason Roberts of Intelprovidedetails on how to break up task threads in a parallel programmingenvironment so that multiple operations can proceed simultaneously.
*OptimizingSoftware for Multicore Processors
Multicore processors present the challenge of deciding how tovalidate and optimize code for performance gains.
*Understandpacket-processing performance when employing multicore processors
Your cache configuration can have a bigger impact on overallmulticoresystem performance than you expect.
* Multi-threadeddebugging techniques
Several general principles can be applied to debuggingmulti-threadedsoftware applications.
*Getmulticore performance from one core.
An SoC with a multithreaded virtual multiprocessor might bejust whatyou're looking for.
* Goingmulticore presents challenges and opportunities
Performance and power efficiency are key advantages, butthey're alsochallenging as the number of cores increases.
*
Excerpts from Wayne Wolf's book High-PerformanceEmbedded Computing . This five-part series describes thedifferences between running software on embedded multiprocessors versusgeneral purpose systems and the precautions that must be taken.
Part1, The role of the operating system
Part2, Multiprocessor Scheduling
Part3, Event-driven multiprocessor scheduling analysis
Part4, What's different about multiprocessor software?
Part5,  Achieving multiprocessor quality of service?
*
Excerpts from the book Customizable EmbeddedProcessors .In this four-part series entitled “Using sub-RISC processors innext generation customizable multi-core designs,” the authors statethe case for sub-RISC processing elements as the natural multicore SoCbuilding block.
Part1, Concurrent architectures, concurrent applications.
Part2, Generating a multicore architecture from the instruction set.
Part3, Deploying applications with Cairn.
Part4, IPV4 Forwarding Design Example
* A three-part series “Techniques for debugging anasymmetric multicore application” from Intel's Julien Carreno.
Part1, A typical asymmetric multi-core application
Part2, Tools for debugging
Part3, typical multicore debugging problems
* A seven-part series entitled “The challenges ofnextgenmulticore networks-on-chip systems” based on Luca Benini andGiovanni De Micheli's book Networks On Chips .
Part1, Why on-chip networking?
Part2, SoC objectives and NoC needs
Part3, Basic NoC approaches
Part4, Programming issues and approaches
Part5, Task-level parallel programming on multicore Networks-On-Chip
Part6, Communications-exposed programming
Part7, Tools for nextgen multicore networks-on-chips.
* Programmingthe Cell Processor
Our authors present algorithms and strategies they've used tomakebreadth-first searching on graphs as fast as possible on the Cellmulticore processor.
* DemystifyingESL for embedded systems designs
While the definitions of ESL may vary, the end result should bethesame, namely letting developers of multiprocessor and multicore systemsanalyze their designs at a higher level of abstraction.
* Taking the first step towards MPSoC design with network-on-chipmethodologies
Marcello Coppola and Carlo Pistritto describe the details of STMicro'snetwork-on-chip interconnect topology and provide perspective on howNoCs will solve some of the troubling on-chip traffic jams.
* Designing low-power multiprocessor chips
Chip designers face the challenge of reducing the number ofgates in adesign and implementing efficient architectures to reduce die size andthe total power consumption of a system.
* Parallelprocessing for multi-core DSPs 
Modern video-processing systems running multiple applicationssuch asimage processing, compression and content analysis force systemsdesigners to use multiple DSP chips, FPGAs and a system controller, butchip-level software tools don't address the system integration issues.
* Designingcustom embedded multicore processors
There are “multi” paths a designer can take to get the neededperformance.
* FunctionalTLM simplifies heterogeneous multiprocessor softwaredevelopment
Virtual prototyping technology is emerging that allows thecreation ofa high-performance, functional software model of an embedded multicoresystem that fully mirrors the hardware functionality
* Tipsfor effective usage of the shared cache in multi-core architectures
Tian Tian of Intel provides some guidelines on what to do andwhat toavoid when implementing shared cache in your multi-core based design.
* UsingPCIe in a variety of multiprocessor system configurations
Spanning the range from a uni-processor I/O interconnect fordesktopsystems to a backplane fabric supporting multiple processors forcommunications, PCIe is the only serial interconnect needed for insidethe box designs.
* Thesoftware industry needs to adapt–and soon–to multicore chips
The big question is how — and how soon — the softwareindustry willstep up and produce applications that can take advantage of multiplecores.
* Multicorefaces a long road
This may go down as the year the electronics industry woke upto thefull breadth and significance of the trend to multicore processors.
* WhyMultiprocessor Systems Need CORBA
CORBA enables software components in a multiprocessor system toeasilycommunicate–regardless of what language they are written in, what OSthey run on, or where they are located. Even better, COBRA makes iteasy to move functionality between DSPs, GPPs, and FPGAs.

2006
*Achievingmulticore performance in a single core SoC design using amulti-threaded virtual multiprocessor: Part 2
*Achievingmulticore performance in a single core SoC using a multi-threadedvirtual multiprocessor: Part 1
*Embeddedmulticore needs communications standards
*Developmentand Optimization Techniques for Multicore Processors
*Effectiveuse of RTOS programming concepts for advanced multithreadedarchitectures
*Leveragingmulti-core processors with graphical system design tools
*Multicoresolutions proliferating
*Multicore:Sell it simple
*Needed-clearthinking about multithreading and multi-core
*Usinga multicore RTOS for DSP applications
*Programmingheterogeneous multiprocessors
*WhenGHz don't add up
*Designand verification strategies for complex systems
*Providingmore JTAG debug visibility into multicore System on Chip MCUs
*Whynot outsource the interconnect?
*Programmingthe Cell Broadband Engine
*Aglimpse inside the Cell processor
*Tamingthe Hydra
*Tacklingmemory allocation in multicore and multithreaded applications
*21stcentury multiprocessor design: Part 1
*Tutorial:Howto analyze your multiprocessing options Part 2 – Best Practice
*Low-power,dual-ports for inter-processor communications in next-generationhandsets
*Tutorial:Howto analyze your multiprocessing options ” Part 1
*MultithreadedProgramming Quickstart
*Convergentprocessors solve development challenges
*TheEclipse Device Software Development Platform Target Management
*Softwareperformance considerations when using cache
*SoCprocessor is set for the big picture
*AdvancedProcessor Features and Why You Should Care Part 2
*Designingwith an embedded soft-core processor
*AdvancedProcessor Features and Why You Should Care Part 1
*Makingthe Most of Multi-Core Processors Part 2
*Debuggingreal-time multiprocessor systems Part 1
*Commonprogramming models for use on a dual-core processor
*SoftwareDesign Issues for Multi-core/Multiprocessor Systems
*Makingthe Most of Multi-Core Processors: Part 1
*Debuggingreal-time multiprocessor systems: Part 2
*Debuggingreal-time multiprocessor systems: Part 1
*Commonprogramming models for use on a dual-core processor
*LINX:an open source IPC for distributed multicore embedded designs
*Applyingdistributed system concepts to embedded multiprocessor designs Part 3
*Usingsoftcore-based FPGAs to balance hardware-software needs in a multicoredesign
*PuttingMulticore Processing in Context Part 2
*Virtualsystem prototypes ease embedded multicore design
*Simulatingand debugging multicore behavior
*Applyingdistributed system concepts to embedded multiprocessor designs: Part 2
*Applyingdistributed system concepts to embedded multiprocessor designs: Part 1
*Dealingwith the design challenges of multicore embedded systems
*Usingdual port interconnect to resolve multiprocessor system bottlenecks
*Puttingmulticore processing in context: Part One

2005
*Usingsoftware synthesis for multiprocessor OS and software development
*DevelopingDSP code on converged hybrid DSP/RISC cores
*Howto make your asymmetric multiprocessor design OS and CPU independent
*Howto adapt traditional RTOSes to symmetric multiprocessing
*Threadversus task management in a dual mode DSP/RISC RTOS environment
*Simplifyyour multiprocessor-based network design with multicoreFPGAs
*WhatAmdahl's Law can tell us about multicores and multiprocessing
*Usingan asymmetric multiprocessor model to build hybrid multicore designs
*Usingsystem services for real time embedded multimedia applications
*Choosingthe right multiprocessor development tools
* Usevirtual prototypes to model multiprocessor system power needs
*Designingsupersystems-on-chip(SSoC)
*Extremepartitioning
*Multiprocessordesign for SoCs
*Gettingthe most from multiprocessor SoC design
*Subtractsoftware costs by adding CPUs

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