In Multi TimeMachine, Green Hills Software has added visibility into the complex interactions of software running on multicore MIPS and Renesas RH850 and V850 processors, designed to speed time-to-market and provide higher reliability for multicore-based firmware products. For SoC designers, Multi TimeMachine assists with pre-tape-out chip verification, reducing risk, time-to-market, and time to accelerate silicon sales. TimeMachine advanced scripting capabilities allow for automated testing on virtual platforms. Multi TimeMachine enables developers to visualize, replay, and debug their software’s execution backward in time across multiple cores within an SoC.
The TimeMachine debugger allows the user to synchronously step forward and backward on all cores, to set software and hardware breakpoints and to run forwards or backwards, so all cores synchronously stop upon hitting the breakpoint. As a result the user can see what all cores are doing before and upon hitting those breakpoints. Developers can optimize their program through profiling information derived non-intrusively from gigabytes of trace data. Beyond debugging, confidence for completeness in testing can be obtained from code coverage data also derived non-intrusively from the trace data.
The TimeMachine debugger provides developers the ability to run and step an application back in time after a failure occurs, allowing easy identification of its root cause. This avoids the tedious and open-ended process of trial-and-error debugging required by previous generations of debuggers. The TimeMachine suite also includes a number of visualization tools, such as the PathAnalyzer, which bring to light complex system execution flow, making it easier to locate and mitigate performance bottlenecks.