National Instruments has just released is USRP RIO platform for for rapidly prototyping high-performance, multichannel wireless communication systems based on the use of software defined radio (SDR) techniques.
Initially used mainly in military/aerospace applications in a software defined radio architecture, the traditional a mixers, filters, amplifiers, modulators/ demodulators, and detectors in a radio communication system are instead implemented by means of software.
An SDR-based wireless device is flexible enough to avoid the “limited spectrum” assumptions of designers of previous kinds of radios through the use of spread spectrum and ultrawideband techniques, software defined antennas, cognitive radio techniques and dynamic transmitter power adjustment.
It allows the design of wireless mesh network where every added radio increases total capacity and reduces the power required at any one node, since each node only transmits loudly enough for the message to hop to the nearest node in that direction, reducing near-far problem and reducing interference to others.
The NI USRP RIO platform is built on the NI LabVIEW RIO architecture and combines a high-performance 2 x 2 multiple input, multiple output (MIMO) RF transceiver capable of transmitting and receiving signals from 50 MHz to 6 GHz with an open LabVIEW programmable FPGA architecture.
NI USRP-295x devices are equipped with a GPS-disciplined 10 MHz oven-controlled crystal oscillator (OCXO) reference clock. The OCXO reference clock is 100 times more accurate than a standard temperature compensated crystal oscillator. The GPS disciplining offers improved frequency accuracy and synchronization capabilities.
Wireless engineers can use this technology to rapidly prototype real-time wireless communications systems and test them under real-world conditions. They can also prototype more capable wireless algorithms and systems faster and reduce time to results using the only complete platform to take full advantage of a graphical system design approach.
The USRP RIO family is based on the Xilinx Kintex-7 Series FPGA and incorporates a low latency PCI Express connection to a host computer.