Embedded engineering is broken. Time-to-market and cost pressures have engrained mantras of “just in time” and “good enough” into the design principles of too many OEMs. While underpinnings of rigor still exist within embedded engineering organizations and remain critical to a number of device classes possessing functional safety considerations, more and more development teams are forced to compromise ideals in order to meet deadlines and maximize near-term profitability. And these compromises are made with a full 40% of projects still reported as late.
A (not so) new and growing challenge is now looming for many engineering organizations – the adoption of heterogeneous processor architectures. Across the embedded market, OEMs and their semiconductor suppliers are recognizing the wide array of performance and cost advantages these systems can offer. These new chipsets, however, often require new system architectures, runtimes, and tools in order to take full advantage of the processor architectures and maximize the potential performance gains – and to avoid potential pitfalls from unneeded development issues.
Processing Unit Types Used in Current Project (Percent of Respondents)
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Source: VDC Research
So in a time when everyone is talking about new platforms that are supposed to revolutionize development as part of the IoT market transformation, how are we arriving at a place where we are still talking about late projects and new challenges that engineering organizations have to handle?
Well, for one, engineering is hard! But more importantly, these new device functionality goals often also require fundamental shifts in underlying hardware architectures. The evolution of the semiconductor market has commoditized compute resources, making more power available for a lower cost and with less physical real-estate. And to optimize performance, more OEMs are now looking for complex SoCs, ASICs, or programmable logic.
In general, the average engineer expects more processing units than in past years. Connectivity requirements of the Internet of Things initiatives are driving further diversification of processing applications as semiconductor vendors are driven to produce a range of SoC variants with different sets of integrated peripherals and radios. Although there has been some level of market consolidation around ARM and x86 processor architectures over recent years, the sheer number of chipsets and the increasing pace of product evolution present challenges to OEMs. In particular, the optimized performance desired by engineering organizations is leading more OEMs to adopt leading-edge SoCs with asymmetric/heterogeneous architectures, such as Freescale/NXP’s i.MX 6SoloX, Texas Instruments’ Sitara AM571x/AM572x and Xilinx’s Zynq UltraScale+ MPSoC.
Heterogeneous SoCs can, in fact, lead to a number of advantages over traditional architectures, such as:
- System Consolidation and Cost Savings;
- Improved Power Management; and
- Safe and Secure Separation
The adoption of heterogeneous systems brings with it a wide range of potential benefits. The advantages, however, do not come without added challenges and new considerations for development organizations. Many engineering organizations simply lack the experience, tools and technologies to adequately and efficiently develop these next-generation systems.
If you’re interested in learning more about what these challenges are and what potential solutions could work for your organization, please listen to my upcoming webcast with Mentor Graphics on Thursday, May 26th at 1:00PM ET/10:00AM PT .