Network MCU integrates MAC and TCP IP -

Network MCU integrates MAC and TCP IP

The DS80C400 network microcontroller with multiple on-chipperipherals

The Dallas Semiconductor DS80C400 networked microcontrollerintegrates a high-speed 8051 core, a 10/100Mb Ethernet MAC, andsilicon software TCP IPv4/v6 stack. The DS80C400 can be connecteddirectly to IP networks and operates at up to 75MHz.

It is able to perform local control while also servicing networkrequests. In addition to the Ethernet MAC, the DS80C400 includesthree synchronous/asynchronous serial ports that operate up to18.75Mbps, a CAN2.0B controller, up to eight ports (64 I/O pins), anda 1-Wire master.

The 8051-compatible microcontroller executes instructions up tothree times faster than an original 8051 at the same crystal speed.Its maximum system-clock frequency of 75MHz results in a minimuminstruction cycle time of 54ns.

Access to large program or data memory areas is simplified with a24-bit addressing scheme that supports up to 16MB of flat memory. Toaccelerate data transfers between the microcontroller and the 16MBmemory map, the DS80C400 provides four data pointers, each of whichcan be configured to automatically increment or decrement uponexecution of certain data pointer-related instructions.

The microcontroller's hardware math accelerator further increasesthe speed of 32-bit and 16-bit multiply and divide operations as wellas high-speed shift, normalization, and accumulate functions.

Instant connectivity and networking support are provided throughan embedded 64kB ROM. This contains firmware to perform a networkboot over an Ethernet connection using DHCP in conjunction with TFTP.The ROM firmware realizes a full, application-accessible TCP/IPstack, supporting both IPv4 and IPv6, and implements UDP, TCP, DHCP,ICMP, and IGMP. A priority-based, preemptive task scheduler is alsoincluded. The firmware has been structured so that a MAC address canoptionally be acquired from an IEEE-registered DS2502-E48.

The 10/100 Ethernet MAC on the DS80C400 complies with both theIEEE 802.3 MII and ENDEC PHY interface standards. The MII interfacesupports 10/100Mbps bus operation and the ENDEC interface supports10Mbps operation.

Low power operation

The MAC has been designed for low-power standard operation and canoptionally be placed into an ultra-low-power sleep mode, to beawakened manually or by detection of a Magic Packet or wake-up frame.Incorporating a buffer control unit reduces the burden of Ethernettraffic on the CPU. This unit, after initial configuration through anSFR interface, manages all Tx/Rx packet activity and status reportingthrough an on-chip 8kB SRAM.

The DS80C400 MAC can be operated in half-duplex or full-duplexmode with flow control, and provides multicast/broadcast-addressfiltering modes as well as VLAN tag recognition capability.

The full-function CAN 2.0B controller provides 15 total messagecenters, 14 of which can be configured as either transmit or receivebuffers and one that can serve as a receive double buffer. The devicesupports standard 11-bit or 29-extended message identifiers, andoffers two separate 8-bit media masks and media arbitration fields tosupport the use of higher-level CAN protocols such as DeviceNet andSDS. A special auto-baud mode allows the CAN controller to quicklydetermine required bus timing when inserted into a new network.

A SIESTA sleep mode has been made available for times when the CANcontroller can be placed into a power-saving mode.

Integrated functions of the DS80C400 include 16 interrupt sources(six external), four timer/counters, a programmable watchdog timer, aprogrammable IrDA output clock, an oscillator-fail detection circuit,and an internal 2X/4X clock multiplier. This frequency multiplierallows the microcontroller to operate at full speed with a reducedcrystal frequency, reducing EMI.

The low-voltage microcontroller core runs from a 1.8V supply whilethe I/O remains 5V tolerant, operating from a 3.3V supply. Apower-management mode (PMM) allows software to switch from thestandard machine cycle rate of 4 clocks per cycle to 1024 clocks percycle. For example, 40MHz standard operation has a machine cycle rateof 10MHz. In PMM, at the same external clock speed, software canselect a 39kHz machine cycle rate, considerably reducing powerconsumption.

Development support

A DS80C400 reference design should enable an embedded web serverto be built in hours. A free download provides the Tiny InternetInterface (TINI) runtime environment while the DSTINIm400-144verification module is also available for developers who want aproven implementation of the reference design for rapid evaluationand system integration. To streamline access to the network,application code can be written in Java or C.

Published in Embedded Systems (Europe) November2002

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.