San Jose, Ca. – The Open CoreProtocol International Partnership (OCP-IP) has just released a newdebug specification for member review, detailing an approach to astandardized OCP-bus compliant debug interface.

The debug proposal outlines an optional OCP port that implements adebug interface socket that can be added to all cores and IP blocks. Itsupports a uniform method of on-chip system analysis and access toembedded information at the core, multicore, and systems levels.

The debug interface socket defines several layers of extendedfunctionality to address the diverse and increasing debug needs forsoftware, hardware, and mixed SoC prototyping. It is intended to becompatible with other industry standards efforts addressing debug andrelated on-chip issues.

Work on the specification was done by the OCP-IP DebugWorking Group, which included Texas Instruments, HDL Dynamics, MIPSTechnologies, and Pixelworks with the close cooperation and welcomedcontributions of several other sponsor membercompanies and other independent organizations.

The document describes an overall debugging framework as the basisof the OCP debug interface. In the same way that the OCP data frameworkis a functional superset for various bus interfaces and datastructures, the OCP debug framework defines an OCP debug interfacesocket that can connect to a superset of debug solutions, includingthose developed outside of OCP-IP.

The specification loosely defines requirements and a set of debugsignals at the OCP socket and fabric levels, leaving much of thespecific options forimplementation open to IP and tools vendors.

Commercial and licensable instrumentation IP and tools supportingmany of the debug socket interface options are available today fromOCP-IP members.

Companies wishing to participate in the OCP-IP Debug Working Groupare invited to contact admin@ocpip.org. To read more there are  threeDesign Articles on Embedded.com  on the debug spec and how touse it.