San Jose, Ca. – IMEC, Europe's nanoelectronics research Institute chose the venue of the Embedded Systems Conference here to take the wraps off a suite of tools and methods to optimize the mapping of applications on embedded multiprocessor system-on-chip (MPSoC) platforms.
The aim is to simplify and speed up the design more energy-efficient systems that can be introduced to the market in a shorter time window.
The tools, institute officials said, are intended for companies that design multicore platforms for tomorrow's nomadic and multimedia applications. They are offered under a technology transfer or license agreement.
They said the first industrial multiprocessor system-on-chip (MPSoC) platforms have already found their way into embedded systems for advanced entertainment and communication platforms.
They said the ever increasing performance hunger of battery-operated embedded devices, such as cell phones or portable media players, calls for multi-core architectures. But mapping applications efficiently on MPSoC remains challenging. Due to the vastness and complexity of the design space, i.e. the number of design options, this task is virtually impossible without the proper tool support.
The IMEC MPSoC technology provides solutions by focusing on design-time application mapping. The technology's two main threads offer support for fast parallelization (with the Multi-processor Parallelization Assistant tool) and support for memory hierarchy optimizations (with the Memory Hierarchy tool). IMEC's tools, methods, and associated services have a proven industrial strength.
They have been used by IMEC's industrial partners for commercial embedded systems as well as for in-house IMEC MPSoC implementations, e.g. IMEC's advanced multi-core platform for software-defined radio and a multi-core multi-media platform using 6 of IMEC's ADRES processor cores.
Interested companies may license the tools, or acquire them under a technology transfer agreement.
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