Octasic Inc. (Montreal, Canada) is boosting the processing power of its DSP chips by increasing the number of Opus DSP cores from 15 to 24.
The company introduced its Vocallo, multi-core gateway DSP platform in October 2007 and its latest series, the OCT2200 has up to 24 Opus2 DSP cores with a range of I/O interfaces and an optional ARM core.
The second generation of the Opus DSP core (Opus2) can deliver over 36 GMACs with less than 55 mW of power consumption per GMAC, under worst case process, voltage, and temperature (PVT) conditions. The Opus DSP asynchronous architecture reduces power characteristics and raises efficiency by eliminating state-elements and clock trees, reducing timing constraints and reducing capacitance. Octasic says that the asynchronous design cuts area by a half and reduces power by two-thirds.
With the OCT2200 series, Octasic is also releasing Opus Studio, an integrated graphical development environment enabling customers today to develop applications. In addition to developing their own code, customers can draw on an extensive set of libraries for voice, video, RF, and generic signal processing. It is built on Microsoft Visual Studio Shell with a source code editor, project manager & build system and multi-core debugger provided by the host tool. Octasic has added fast and timing accurate simulators, application and function profilers and an optimizing C compiler.
The first two members of the OCT2200 family are the OCT2224M for media processing and the OCT2224W for wireless baseband applications. The performance of the OCT2224M device allows a complete encoding for two 1080p video streams simultaneously with no dedicated hardware acceleration. Built on the same technology, the OCT2224W device can implement a complete multi-standard picocell that can provide LTE, WiMAX, HSPA+, EDGE, or any other commercial wireless standard.
The OCT2224M is designed to address the exploding demand for high-definition (HD) video and can simultaneously support 2 channels of 1080p while consuming less than 3 watts of power. The same device can process hundreds of channels simultaneously, allowing for any combination of bit-rates and resolutions, from QCIF up to HD. This flexible device provides support for all popular video codecs including MPEG-2, H.263, MPEG-4, H.264, VC-1 and VP8.
With Opus Studio, an integrated development environment, developers can program the OCT2224M devices in C programming language. A single hardware platform can be used to address a range of video applications, including video conferencing, telepresence, Internet video streaming and transcoding, mobile video streaming and content adaptation, IP video surveillance, and IPTV services. In addition to developing their own code, customers can draw on an extensive set of video library functions.
The video capture and display interfaces are BT.656 for SD and BT.1120 for HD. There are serial Rapid IO (SRIO), Gigabit Ethernet, PCI Express, DDR2, DDR3 interfaces.
The OCT2224W is designed to address the rapidly growing market for small cell and femtocell-based applications, performing LTE PHY and MAC for a 20MHz 2×2 BTS at 3 Watts.
The homogeneous architecture simplifies application partitioning and allows coarse grain parallelism, while its highly programmable hardware accelerators support both today’s cellular standards and are flexible enough to support revisions to future standards.
This device provides a platform for basestations of all sizes and for all air interfaces, including low-power basestations for rural areas, macro basestations, outdoor small-cell basestations, and indoor high-traffic and enterprise femtocells.
Octasic provides PHY software libraries that offer standard compliant GSM, EDGE, WCDMA, HSPA+, and LTE functionality. For example, an OCT2224W device can implement a complete multi-standard picocell that can provide LTE, WiMAX, HSPA+, EDGE, or any other commercial wireless standard on a single hardware platform.